Timing Analyzer - HP 64700 Series User Manual

64000-ux case solutions for microprocessors, softkey interface
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Timing Analyzer

A-2 External Analyzer Specifications
Minimum Clock Width = 10 ns.
Minimum Clock Period:
– No Tagging Mode = 40 ns (25 Mhz clock).
– Event Tagging Mode = 50 ns (20 MHz clock).
– Time Tagging Mode = 60 ns (16 MHz clock).
Minimum Time from Slave Clock to Master Clock = 10 ns.
Minimum Time from Master Clock to Slave Clock = 50 ns.
Sample Rate Accuracy = 0.01%.
Asychronous Pattern - Trigger on pattern is less than or
than specified duration. Pattern is logical AND of
specified low, high or don't care for each channel. If the
pattern is true then false for less than the duration there is
a 20 ns reset time before looking for the pattern again.
Greater Than Duration = Range 30 ns to 10 ms.
Resolution is + /-10 ns or 0.01% whichever is greater.
Accuracy is + /-10 ns + 0.01% + 20/-0 ns.
Less Than Duration = Range 40 ns to 10 ms. Resolution
is + /-10 ns or 0.01% whichever is greater. Pattern must be
valid for at least 20 ns. Accuracy is + /-10 ns + 0.01%
+ 20/-0 ns.
Delay Accuracy = 0.01% + /-10 ns.
Minimum Detectable Glitch = 5 ns at threshold.
Skew = 4 ns (typical).

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