HP 16600A Series User Manual

HP 16600A Series User Manual

Solutions for the motorola cpu32
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Summary of Contents for HP 16600A Series

  • Page 1 T h e t e s t & me a s u r e me n t e q u i p me n t y o u n e e d a t t h e p r i c e y o u w a n t . A l l t e s t I n s t r u me n t s , I n c .
  • Page 2 User’s Guide Publication number E2480-97002 July 1998 © Copyright Hewlett-Packard Company 1994-1998 All Rights Reserved For Safety information, Warranties, and Regulatory information, see the pages behind the index. Solutions for the Motorola CPU32...
  • Page 3: Hp Solutions For The Motorola Cpu32-At A Glance

    HP Solutions for the Motorola CPU32—At a Glance This manual describes several ways to connect an HP logic analysis system to your target system. These connections use an analysis probe, plus an emulation module (for an emulation solution). Analysis Probe The analysis probe connects your logic analyzer to your target system for state and timing analysis.
  • Page 4 Emulation Solution The emulation solution includes an analysis probe, an emulation module, cables and adapters, and the HP B4620B Source Correlation Tool Set (for analyzing high-level source code). This solution is designed to be used with an HP 16600A/700A-series logic analysis system.
  • Page 5: In This Book

    This book documents the following products: Analysis Probe Processor supported Product ordered Includes 68331, 68332, 68334, 68335 HP E9589A Option #002 HP E2480A analysis probe and inverse 132-pin PQFP assembler 68331, 68332 HP E9589A Option #003 HP E2480A analysis probe and inverse 144-pin TQFP...
  • Page 6: Table Of Contents

    HP Solutions for the Motorola CPU32—At a Glance 2 In This Book 4 1 Overview Overview 16 Setup Checklist 17 Setup Assistant Analysis Probe Equipment supplied 20 Minimum equipment required 22 Additional equipment supported 22 Logic analyzers supported 23 Logic analyzer software version requirements 24...
  • Page 7 Target System Requirements 37 Analysis probe—circuit board dimensions 38 Power-on/Power-off Sequence 39 To power on HP 16600A and HP 16700A-series logic analysis systems 39 To power on all other logic analyzers 39 To power off 40 Connecting the Analysis Probe to the Target System 42...
  • Page 8 Symbols and Source Code in the Analyzer 108 User-Defined Symbols Predefined CPU32 Symbols Object File Symbols Requirements 110 To use object file symbols in the HP 16600A/700A 111 Compilers 112 Source Code 116 Inverse Assembler Generated PC (Software Address) Label Access to Source Code Files...
  • Page 9 Triggering on Symbols and Source Code 120 To avoid triggering on prefetched instructions 120 To correlate relocatable code using the address offset 6 Connecting and Configuring the Emulation Module Connecting and Configuring the Emulation Module 124 Using the Emulation Control Interface 125 To start the Emulation Control Interface from the main System window 127 To start the Emulation Control Interface from the Workspace window 127 To start the Emulation Control Interface from the Workspace window for an...
  • Page 10 To configure using the built-in commands 148 To configure using a debugger 149 To configure the processor type 150 To configure the processor clock speed (BDM communication speed) 151 To set the default clock rate if the processor clock rate is less than 8 MHz 152 Detailed information about processor clock rates 154 To configure restriction to real-time runs 156 Testing the emulator and target system 157...
  • Page 11 Internal Representation of SIM and EMSIM Registers 171 8 Using the Emulator with a Debugger Using the Emulator with a Debugger 174 Setting up Debugger Software 177 To connect the logic analysis system to the LAN 178 To change the port number of an emulator 180 To verify communication with the emulator 181 To export the logic analysis system’s display to a workstation 182 To export the logic analysis system’s display to a PC 183...
  • Page 12 Which assembly-level listing should I use? 204 Which source-level listing should I use? 205 Where can I find practical examples of measurements? 205 Triggering the Emulation Module from the Analyzer 206 To stop the processor when the logic analyzer triggers on a line of source code (Source Viewer window) 206 To stop the processor when the logic analyzer triggers (Intermodule window) 207...
  • Page 13 GPA Record Format Summary 240 SECTIONS 242 FUNCTIONS 243 VARIABLES 244 SOURCE LINES 245 START ADDRESS 246 Comments 246 12 Troubleshooting the Analysis Probe Troubleshooting the Analysis Probe Logic Analyzer Problems 249 Intermittent data errors 249 Unwanted triggers 250 No activity on activity indicators 250 No trace list display Analyzer won’t power up 251 Analysis Probe Problems 252...
  • Page 14 Returning Parts to Hewlett-Packard for Service 262 To return a part to Hewlett-Packard 262 To obtain replacement parts 263 Cleaning the Instrument 264 13 Troubleshooting the Emulation Module Solving Problems 266 Troubleshooting Guide 267 Emulation Module Status Lights 268 Emulation Module Built-in Commands 269 To telnet to the emulation module 269 To use the built-in commands 270 Problems with the BDM Connection 272...
  • Page 15 To clean the instrument 281 Glossary Solutions for CPU32...
  • Page 16 Overview...
  • Page 17: Overview

    Overview This chapter describes: • Setup Checklist • Setup Assistant • Equipment used with the analysis probe (including a list of logic analyzers supported) • Equipment used with the emulation module • System configurations • Additional information sources Solutions for CPU32...
  • Page 18: Setup Checklist

    • Check that you received all of the necessary equipment. See page 20 (analysis probe) or page 25 (emulation module). • If you need to install an emulation module in an HP 16600A/700A series logic analysis system, see page 134.
  • Page 19 Chapter 1: Overview Setup Checklist Install emulation module (if necessary) Install software Install analysis probe Connect analysis Emulation probe to target system module Through connection Analysis Probe Connect analyzer type? cables Load inverse assembler Direct to Target Connect emulation Connect emulation module module to analysis Connect emulation module...
  • Page 20: Setup Assistant

    The Setup Assistant is an online tool for connecting and configuring your logic analysis system for microcontroller and bus analysis. The Setup Assistant is available on the HP 16600A and HP 16700A-series logic analysis systems. You can use the Setup Assistant in place of the connection and configuration procedures provided in this manual.
  • Page 21: Analysis Probe

    The equipment supplied with the analysis probe is shown in the illustration on the next page. It is listed below: • The HP E2480A analysis probe circuit board. • Four HP E5346A high-density termination cables. • Logic analyzer configuration files and inverse assembler software on a CD- ROM (for HP 16600A/700A series logic analysis systems).
  • Page 22 Chapter 1: Overview Analysis Probe Equipment Supplied with the HP E2480A Analysis Probe Solutions for CPU32...
  • Page 23: Minimum Equipment Required

    Additional equipment supported Emulation module. The HP E2480A has a built-in connector for an emulation module. HP B4620B Source Correlation Tool Set. The analysis probe and inverse assembler may be used with the HP B4620B Source Correlation Tool Set.
  • Page 24: Logic Analyzers Supported

    Chapter 1: Overview Analysis Probe Logic analyzers supported The table below lists the logic analyzers supported by the HP E2480A analysis probe. Logic analyzer software version requirements are shown on the following page. The HP E2480A requires four logic analyzer pods (68 channels) for inverse assembly.
  • Page 25: Logic Analyzer Software Version Requirements

    The latest HP 16700A logic analyzer software version is on the CD- series ROM shipped with this product. HP 16500C 1.07 Mainframe HP 16500B 3.14 Mainframe * The mainframes are used with the HP 16550 and HP 16554/55/56 logic analyzers. Solutions for CPU32...
  • Page 26: Emulation Module

    The equipment supplied with your emulation module includes: • An HP 16610A emulation module. If you ordered an emulation module as part of your HP 16600A or HP 16700A logic analysis system, it is already installed in the frame. • A target interface module (TIM) circuit board.
  • Page 27: Minimum Equipment Required

    Minimum equipment required The following equipment is required to use the emulation module: A method for connecting to the target system. The HP E2480A analysis probe provides a debug port connector. You can also design a debug port connector on the target system (see “Designing a Target System for the Emulation Module”...
  • Page 28: Emulation Solution

    The combination of an analysis probe, an emulation module, and an HP 16600A or HP 16700A logic analysis system lets you both trace and control microcontroller activity on the target system. The analysis probe supplies signals from the target microcontroller to the logic analyzer.
  • Page 29: Additional Information Sources

    Application notes may be available from your local HP representative or on the World Wide Web at: http://www.hp.com/go/logicanalyzer If you have an HP 16600A or HP 16700A logic analysis system, the online help for the Emulation Control Interface has additional information on using the emulation module.
  • Page 30 Installing Software...
  • Page 31: Installing Software

    Installing Software This chapter explains how to install the software you will need for your analysis probe or emulation solution. Installing and loading Installing the software will copy the files to the hard disk of your logic anlysis system. Later, you will need to load some of the files into the appropriate hardware module.
  • Page 32: What Needs To Be Installed

    • Personality files for the Setup Assistant • Emulation module firmware (for emulation solutions) • Emulation Control Interface (for emulation solutions) The HP B4620B Source Correlation Tool Set is installed withthe logic analysis system’s operating system. Other HP logic analyzers The following files can be installed from a floppy disk: •...
  • Page 33: To Install The Software From Cd-Rom (Hp 16600A/700A)

    Installing a processor support package from a CD-ROM will take just a few minutes. If the processor support package requires an update to the HP 16600A/700A operating system, installation may take approximately 15 minutes. If the CD-ROM drive is not connected, see the instructions printed on the CD-ROM package.
  • Page 34: To List Software Packages Which Are Installed (Hp 16600A/700A)

    The online help for more information on installing, licensing, and removing software. To list software packages which are installed (HP 16600A/700A) In the System Administration Tools window, click List..To install software on other logic analyzers Consult the documentation for your logic analyzer for details.
  • Page 35 Solutions for CPU32...
  • Page 36: Connecting And Configuring The Analysis Probe

    Connecting and Configuring the Analysis Probe...
  • Page 37: Connecting And Configuring The Analysis Probe

    This chapter shows you how to connect the logic analyzer to the target system through the analysis probe. If you are connecting to an HP 16600A-series or HP 16700A-series logic analyzer, use the Setup Assistant to connect and configure your system (see page 19).
  • Page 38: Target System Requirements

    See the diagram on the next page for the dimensions of the analysis probe. You must also allow space for the cables which plug into the top of the analysis probe. The data sheet for your analysis probe, available from your HP See Also representative, has more detailed information and diagrams regarding the keep-out area and analysis probe dimensions.
  • Page 39: Analysis Probe-Circuit Board Dimensions

    Chapter 3: Connecting and Configuring the Analysis Probe Target System Requirements Analysis probe—circuit board dimensions The following figure gives the dimensions for the analysis probe circuit board. The dimensions are listed in inches and millimeters. Analysis Probe Circuit Board Dimension Diagram Solutions for CPU32...
  • Page 40: Power-On/Power-Off Sequence

    Simply stated, your target system is always the last to be powered on, and the first to be powered off. To power on HP 16600A and HP 16700A-series logic analysis systems Ensure the target system is powered off.
  • Page 41: To Power Off

    Chapter 3: Connecting and Configuring the Analysis Probe Power-on/Power-off Sequence To power off • Turn off your target system. • Turn off your logic analysis system. Solutions for CPU32...
  • Page 42 Chapter 3: Connecting and Configuring the Analysis Probe Power-on/Power-off Sequence Connection Sequence Solutions for CPU32...
  • Page 43: Connecting The Analysis Probe To The Target System

    • Turn off the target system. • Turn off the logic analyzer (unless you are using an HP 16600/16700A logic analysis system). • Connect the transition board to the analysis probe.
  • Page 44: To Connect The Transition Board

    Chapter 3: Connecting and Configuring the Analysis Probe Connecting the Analysis Probe to the Target System To connect the transition board The microcontroller-specific transition board properly routes the signals from the probe adapter to the analysis probe. To connect the transition board to the analysis probe: •...
  • Page 45: To Connect The Analysis Probe To The Probe Adapter

    Chapter 3: Connecting and Configuring the Analysis Probe Connecting the Analysis Probe to the Target System To connect the analysis probe to the probe adapter The orientation of the analysis probe with respect to the probe adapter depends on the orientation of the probe adapter with respect to pin 1 of the target system.
  • Page 46: Connecting The Probe Adapter To The Target System

    QFP Probe Adapter to your target system. The illustrations on the following pages show the allowable rotations for the different QFP probe adapters when used with the HP E2480A. Note that the orientation (rotation) of the analysis probe with respect to the probe adapter depends on the orientation (rotation) of the probe adapter with respect to the target system.
  • Page 47 Chapter 3: Connecting and Configuring the Analysis Probe Connecting the Analysis Probe to the Target System 132-pin PQFP Probe Adapter Rotations 132-Pin PQFP Probe Adapter Rotation Diagram Solutions for CPU32...
  • Page 48 Chapter 3: Connecting and Configuring the Analysis Probe Connecting the Analysis Probe to the Target System 144-pin TQFP Probe Adapter Rotations 144-Pin TQFP Probing System Rotation Diagram Solutions for CPU32...
  • Page 49 Chapter 3: Connecting and Configuring the Analysis Probe Connecting the Analysis Probe to the Target System 160-pin QFP Probe Adapter Rotations 160-Pin QFP Probing System Rotation Diagram Solutions for CPU32...
  • Page 50: Connecting The Analysis Probe To The Logic Analyzer

    • HP 16602A logic analyzers (page 56) • HP 16603A logic analyzers (page 58) • HP 16550A logic analyzers (one or two cards) (page 60) • HP 16554/55/56/57 logic analyzers (one or two cards) (page 63) • HP 1660A/AS/C/CS/CP (page 65) •...
  • Page 51: To Connect The High-Density Termination Cables To The Analysis Probe

    Four HP E5346A high-density termination cables, and labels to identify them, are included with the HP E2480A. Connect the cables to the connectors on the analysis probe as shown in the illustration below. Attach the labels to the cables after connecting the cables to the logic analyzer.
  • Page 52: Connecting The High-Density Cables To The Logic Analyzer

    Chapter 3: Connecting and Configuring the Analysis Probe Connecting the Analysis Probe to the Logic Analyzer Connecting the high-density cables to the logic analyzer The following pages show the connections between the logic analyzer pod cables and the high-density cables of the analysis probe. Note that for each logic analyzer, there are separate connections for State and Timing.
  • Page 53: To Connect To The Hp 16600A Logic Analyzer

    To connect to the HP 16600A logic analyzer Use the following figures to connect the analysis probe to the HP 16600A logic analyzer. Find the labels that were shipped with the high-density cables and use them to help identify the connections.
  • Page 54 Chapter 3: Connecting and Configuring the Analysis Probe Connecting the Analysis Probe to the Logic Analyzer HP 16600A Timing Connections. Configuration File (Timing) Use configuration file C_33X_1T or C_37X_1T for Timing analysis with the HP 16600A logic analyzer. Solutions for CPU32...
  • Page 55: To Connect To The Hp 16601A Logic Analyzer

    To connect to the HP 16601A logic analyzer Use the following figures to connect the analysis probe to the HP 16601A logic analyzer. Find the labels that were shipped with the high-density cables and use them to help identify the connections.
  • Page 56 Chapter 3: Connecting and Configuring the Analysis Probe Connecting the Analysis Probe to the Logic Analyzer HP 16601A Timing Connections Configuration File (Timing Analysis) Use configuration files C_33X_1T or C_37X_1T for timing analysis with the HP 16601A logic analyzer. Solutions for CPU32...
  • Page 57: To Connect To The Hp 16602A Logic Analyzer

    To connect to the HP 16602A logic analyzer Use the following figures to connect the analysis probe to the HP 16602A logic analyzer. Find the labels that were shipped with the high-density cables and use them to help identify the connections.
  • Page 58 Chapter 3: Connecting and Configuring the Analysis Probe Connecting the Analysis Probe to the Logic Analyzer HP 16602A Timing Connections. Configuration File (Timing Analysis) Use configuration files C_33X_1T or C_37X_1T for timing analysis with the HP 16602A logic analyzer. Solutions for CPU32...
  • Page 59: To Connect To The Hp 16603A Logic Analyzer

    To connect to the HP 16603A logic analyzer Use the following figures to connect the analysis probe to the HP 16603A logic analyzer. Find the labels that were shipped with the high-density cables and use them to help identify the connections HP 16603A State Connections.
  • Page 60 Chapter 3: Connecting and Configuring the Analysis Probe Connecting the Analysis Probe to the Logic Analyzer HP 16603A Timing Connections. Configuration File (Timing Analysis) Use configuration files C_33X_1T or C_37X_1T for timing analysis with the HP 16603A logic analyzer. Solutions for CPU32...
  • Page 61: To Connect To The Hp 16550A Analyzer

    To connect to the HP 16550A analyzer Use the following figures to connect the analysis probe to the HP 16550A logic analyzer. Find the labels that were shipped with the high-density cables and use them to help identify the connections.
  • Page 62 FORMAT menu shows the pod allocations. If the allocations will not acquire the desired signals, the allocations can be altered manually. One-card HP 16550A Timing Connections. Configuration File (Timing Analysis) Use configuration files C_33X_1T or C_37X_1T for timing analysis with the HP 16550A logic analyzer. Solutions for CPU32...
  • Page 63 Chapter 3: Connecting and Configuring the Analysis Probe Connecting the Analysis Probe to the Logic Analyzer Two-card HP 16550A Timing Connections. Configuration File (Timing Analysis) Use configuration files C_33X_1T or C_37X_1T for timing analysis with the HP 16550A logic analyzer. Solutions for CPU32...
  • Page 64: To Connect To The Hp 16554/55A/56/57D Analyzers

    To connect to the HP 16554/55A/56/57D analyzers Use the following figures to connect the analysis probe to the HP 16554A/55A/56A and HP 16555D/56D/57D logic analyzers. Find the labels that were shipped with the high-density cables and use them to help identify the connections.
  • Page 65 FORMAT menu shows the pod allocations. If the allocations will not acquire the desired signals, the allocations can be altered manually. One- or two-card HP 16554/55/56/57 Timing Connections. Configuration File (Timing Analysis) Use configuration files C_33X_2T or C_37X_2T for timing analysis with the HP 16554/55/56/57 logic analyzers.
  • Page 66: To Connect To The Hp 1660A/As/C/Cs/Cp Logic Analyzers

    To connect to the HP 1660A/AS/C/CS/CP logic analyzers Use the following figures to connect the analysis probe to the HP 1660A/C logic analyzers. Find the labels that were shipped with the high-density cables and use them to help identify the connections. HP 1660-series State Connections.
  • Page 67 Chapter 3: Connecting and Configuring the Analysis Probe Connecting the Analysis Probe to the Logic Analyzer HP 1660-series Timing Connections. Configuration File (Timing Analysis) Use configuration files C_33X_1T or C_37X_1T for timing analysis with the HP 1660-series logic analyzer. Solutions for CPU32...
  • Page 68: To Connect To The Hp 1661A/As/C/Cs/Cp Logic Analyzers

    To connect to the HP 1661A/AS/C/CS/CP logic analyzers Use the following figures to connect the analysis probe to the HP 1661A/C logic analyzers. Find the labels that were shipped with the high-density cables and use them to help identify the connections. HP 1661-series State Connections.
  • Page 69 FORMAT menu shows the pod allocations. If the allocations will not acquire the desired signals, the allocations can be altered manually. HP 1661-series Timing Connections. Configuration File (Timing Analysis) Use configuration files C_33X_1T or C_37X_1T for timing analysis with the HP 1661-series logic analyzer. Solutions for CPU32...
  • Page 70: To Connect To The Hp 1662A/As/C/Cs/Cp Logic Analyzers

    To connect to the HP 1662A/AS/C/CS/CP logic analyzers Use the following figures to connect the analysis probe to the HP 1662A/C logic analyzers. Find the labels that were shipped with the high-density cables and use them to help identify the connections. HP 1662-series State Connections.
  • Page 71 FORMAT menu shows the pod allocations. If the allocations will not acquire the desired signals, the allocations can be altered manually. HP 1662-series Timing Connections. Configuration File (Timing Analysis) Use configuration files C_33X_1T or C_37X_1T for timing analysis with the HP 1662-series logic analyzer. Solutions for CPU32...
  • Page 72: To Connect To The Hp 1670A/D Logic Analyzer

    To connect to the HP 1670A/D logic analyzer Use the following figures to connect the analysis probe to the HP 1670A/D logic analyzer. Find the labels that were shipped with the high-density cables and use them to help identify the connections.
  • Page 73 Chapter 3: Connecting and Configuring the Analysis Probe Connecting the Analysis Probe to the Logic Analyzer HP 1670-series Timing Connections. Configuration File (Timing Analysis) Use configuration files C_33X_2T or C_37X_2T for timing analysis with the HP 1670-series logic analyzer. Solutions for CPU32...
  • Page 74: To Connect To The Hp 1671A/D Logic Analyzer

    To connect to the HP 1671A/D logic analyzer Use the following figures to connect the analysis probe to the HP 1671A/D logic analyzer. Find the labels that were shipped with the high-density cables and use them to help identify the connections.
  • Page 75 FORMAT menu shows the pod allocations. If the allocations will not acquire the desired signals, the allocations can be altered manually. HP 1671-series Timing Connections. Configuration File (Timing Analysis) Use configuration files C_33X_2T or C_37X_2T for timing analysis with the HP 1671-series logic analyzer. Solutions for CPU32...
  • Page 76: To Connect To The Hp 1672A/D Logic Analyzer

    To connect to the HP 1672A/D logic analyzer Use the following figures to connect the analysis probe to the HP 1672A/D logic analyzer. Find the labels that were shipped with the high-density cables and use them to help identify the connections.
  • Page 77 FORMAT menu shows the pod allocations. If the allocations will not acquire the desired signals, the allocations can be altered manually. HP 1672-series Timing Connections. Configuration File (Timing Analysis) Use configuration files C_33X_2T or C_37X_2T for timing analysis with the HP 1672-series logic analyzer. Solutions for CPU32...
  • Page 78: Configuring The Analysis Probe

    Chapter 3: Connecting and Configuring the Analysis Probe Configuring the Analysis Probe Configuring the Analysis Probe Configuring the analysis probe consists of the following: • Setting the ID switches • Interpreting the LEDs • Configuring the analysis probe for address reconstruction The functionality of the analysis probe and logic analyzer, and the accuracy of displays provided by the inverse assembler, depend on the address-reconstruction feature of the analysis probe.
  • Page 79: To Set The Id Switches

    Configuring the Analysis Probe To set the ID switches The HP E2480A provides an identification (ID) which may be used by other system components. The ID consists of primary and secondary values. The primary value is fixed (identifies CPU32 family) by hardware.
  • Page 80: To Interpret The Leds

    • LED DS3 - Reserved for future support of hardware breakpoints. The illustration on the following page shows the HP E2480A LEDs. If DS2 remains lit after power has been applied to the analysis probe, the analysis probe contains an unknown reconstruction configuration.
  • Page 81 Chapter 3: Connecting and Configuring the Analysis Probe Configuring the Analysis Probe HP E2480A LED Locations Solutions for CPU32...
  • Page 82: Configuring The Analysis Probe For Address Reconstruction

    To perform address reconstruction, the analysis probe stores copies of the processor’s internal registers in non-volatile memory. To configure the analysis probe, the HP E2480A must be connected to an emulation module. The general steps are: 1 Set the emulation module’s EMSIM registers.
  • Page 83: To Configure With A Logic Analysis System

    Chapter 3: Connecting and Configuring the Analysis Probe Configuring the analysis probe for address reconstruction • Load code into the target, perform a "reset" and "run", then perform a "break" after the SIM/SCIM registers have been configured. 2 Start a session or open your debugger’s command telnet window.
  • Page 84: Configuring The Logic Analysis System

    The procedures for loading a configuration file depend on the type of logic analyzer you are using. There is one procedure for the HP 16600/ 700 series logic analysis systems, and another procedure for the HP 1660-series, HP 1670-series, and logic analyzer modules in an HP 16500B/C mainframe.
  • Page 85: Systems

    Support Package before you continue. 2 Using File Manager, select the configuration file you want to load in the /hplogic/configs/hp/m683xx/E2480A/ directory, then click Load. If you have more than one logic analyzer installed in your logic analysis system, use the Target field to select the machine you want to load.
  • Page 86: To Load Configuration Files-Other Logic Analyzers

    The configuration files are shown with the logic analyzer connection tables, and are also in the table on the next page. 5 Select the appropriate analyzer on the menu. The HP 165xx logic analyzer modules are shown in the table on the next page.
  • Page 87 7 If you are using the HP 16505A Prototype Analyzer, insert the "16505 Prototype Analyzer" flexible disk into disk drive of the prototype analyzer and update the HP 16505A from the Session Manager. You must close your workspace to run the update.
  • Page 88 Chapter 3: Connecting and Configuring the Analysis Probe Configuring the Logic Analysis System Logic Analyzer Configuration Files Analyzer Configuration File for Configuration File Analyzer Model Description Inverse Assembly for Timing (Modules Only) 16600A C_33X_1S C_33X_1T C_37X_1S C_37X_1T 16601A C_33X_1S C_33X_1T C_37X_1S C_37X_1T 16602A...
  • Page 89 Chapter 3: Connecting and Configuring the Analysis Probe Configuring the Logic Analysis System Solutions for CPU32...
  • Page 90: Analyzing The Cpu32 With A Logic Analyzer

    Analyzing the CPU32 with a Logic Analyzer...
  • Page 91: Analyzing The Cpu32 With A Logic Analyzer

    Analyzing the CPU32 with a Logic Analyzer This chapter describes modes of operation for the HP E2480A analysis probe. It also describes data, symbol encodings, and information about the inverse assembler. The information in this chapter is presented in the following sections: •...
  • Page 92: Modes Of Operation

    Chapter 4: Analyzing the CPU32 with a Logic Analyzer Modes of Operation Modes of Operation The HP E2480A analysis probe can be used in State mode or Timing mode. The following sections describe these operating modes. State mode In State mode, the logic analyzer uses clock store qualification to capture address, data, and status information once during an instruction or data cycle.
  • Page 93: Logic Analyzer Configuration

    Chapter 4: Analyzing the CPU32 with a Logic Analyzer Logic Analyzer Configuration Logic Analyzer Configuration The following sections describe the logic analyzer configuration as set up by the configuration files. Trigger specification The trigger specification is set up by the software to store all states. If you modify the trigger specification to store only selected bus cycles, incorrect or incomplete disassembly may be displayed.
  • Page 94 Chapter 4: Analyzing the CPU32 with a Logic Analyzer Logic Analyzer Configuration Format Menu (State) If fewer than eight pods are available for timing, the logic analyzer will truncate the pods allocated. In this case, the logic analyzer Format menu shows the pod allocations. If the allocations will not acquire the Solutions for CPU32...
  • Page 95 Chapter 4: Analyzing the CPU32 with a Logic Analyzer Logic Analyzer Configuration desired signals, the allocations can be altered manually. Format Menu (Timing) Solutions for CPU32...
  • Page 96 The table below describes each of the bits of the STAT label. This table is specifically for a state configuration. The timing configurations have many of the same signals, and those signals are represented by the same symbols used for state configurations. HP E2480A STAT Bit Description STAT Label Description ~ShoCy When this bit is asserted it indicates the execution of an internal (show) cycle.
  • Page 97 Chapter 4: Analyzing the CPU32 with a Logic Analyzer Logic Analyzer Configuration Predefined Logic Analyzer Symbols The configuration software sets up symbol tables on the logic analyzer. The tables define a number of symbols which make several of the STAT fields easier to interpret.
  • Page 98 Chapter 4: Analyzing the CPU32 with a Logic Analyzer Logic Analyzer Configuration Label Signal Symbol Value ~Bkpt ~Bkpt Break (blank) ~BGAck ~BGAck NoBus (blank) FC[0:2] show user data user pgrm (blank) (blank) supr data supr prgm Solutions for CPU32...
  • Page 99: To Qualify Stored Data

    If you do not want to acquire coprocessor cycles, add “M=1” as a clock qualifier. L=1 Clock Qualifier To open this window in an HP 16600A/700A-series logic analysis system, select the Format tab and click Master Clock..Solutions for CPU32...
  • Page 100: Using The Inverse Assembler

    Chapter 4: Analyzing the CPU32 with a Logic Analyzer Using the Inverse Assembler Using the Inverse Assembler This section discusses the general output format of the inverse assembler and processor-specific information. To display captured state data The logic analyzer displays captured state data in the Listing menu. The inverse assembler display is obtained by setting the base for the DATA label to Invasm.
  • Page 101 Chapter 4: Analyzing the CPU32 with a Logic Analyzer Using the Inverse Assembler Displaying Data with the HP B4620B Source Correlation Tool Set Source correlation correlates the addresses from the trace listing with the high-level code execution. The figure below shows execution of data that is correlated to the data shown on the previous page.
  • Page 102: To Align The Inverse Assembler

    In the Listing Menu figure on page 99, line 1 is the top of the display. 3 Select the appropriate field for your analyzer. a For the HP 16600/700 series analyzers, select "Invasm," then select "Align." b For the other logic analyzers, select "Invasm Options" and use the "Code Synchronization"...
  • Page 103: Inverse Assembler Output Format

    Chapter 4: Analyzing the CPU32 with a Logic Analyzer Using the Inverse Assembler keep that block in the inverse assembled condition. You can inverse assemble several different blocks in the analyzer memory, but the activity between those blocks will not be inverse assembled. Inverse assembler output format The following paragraphs explain the operation of the inverse assembler and the results you can expect under certain conditions.
  • Page 104 "b". The "c" and "b" are displayed in the first column of the mnemonic/hex field. Acquisitions of coprocessor and background cycles may be individually enabled/disabled via clock qualifiers (with an HP 16600A/700A-series logic analysis system, select the Format tab and click Master Clock...). General Missing Terms...
  • Page 105: To Use The Invasm Menu

    Chapter 4: Analyzing the CPU32 with a Logic Analyzer Using the Inverse Assembler To use the Invasm menu The Invasm menu provides three choices: Load, Filter, and Options. These dialogs assist in analyzing and displaying data. Access the Invasm menu in the Listing window. The following sections describe these dialogs.
  • Page 106 Chapter 4: Analyzing the CPU32 with a Logic Analyzer Using the Inverse Assembler The show/suppress settings do not affect the data that is stored by the logic analyzer; they only affect whether that data is displayed or not. You can examine the same data with different settings, for different analysis requirements.
  • Page 107: Inverse Assembler Error Messages

    Chapter 4: Analyzing the CPU32 with a Logic Analyzer Using the Inverse Assembler Inverse assembler error messages Any of the following list of error messages may appear during analysis of your target software. Included with each message is a brief explanation.
  • Page 108: Symbols And Source Code In The Analyzer

    Symbols and Source Code in the Analyzer...
  • Page 109: Symbols And Source Code In The Analyzer

    HP logic analyzers. When source file line number symbols are downloaded to the logic analyzer, you can set up triggers on source lines. The HP B4620B Source Correlation Tool Set also lets you display the high-level source code associated with captured data.
  • Page 110: User-Defined Symbols

    Chapter 5: Symbols and Source Code in the Analyzer User-Defined Symbols User-Defined Symbols User-defined symbols are symbols you create from within the logic analyzer user interface by assigning symbol names to label values. Typically, you assign symbol names to address label values, but you can define symbols for data, status, or other label values as well.
  • Page 111: Object File Symbols

    In order for object file symbols and source code to be accurately assigned to address values captured by the logic analyzer, you need: An accurate bus trace An HP analysis probe is used to capture the microcontroller data. An inverse assembler The inverse assembler software is included with HP analysis probes.
  • Page 112: To Use Object File Symbols In The Hp 16600A/700A

    To use object file symbols in the HP 16600A/ 700A To load symbols in the HP 16600A/16700A-series logic analysis system, open the logic analyzer module’s Setup window and select the Symbol tab; then, select the Object File tab. Make sure the label is ADDR. From this dialog you can select object files and load their symbol information.
  • Page 113: Compilers

    Compilers The following CPU32 compilers and their ELF/DWARF or IEEE-695 format object files can be used with HP logic analyzers and the HP B4620B Source Correlation Tool Set: Object File Formats Language System &...
  • Page 114 See Also Contact your Hewlett-Packard sales engineer to find out if there are other compilers for CPU32 microcontrollers that can be used with HP logic analyzers. Diab Data Compiler Options The following options should be used: Specifies to generate symbolic debugger information (same as -g2).
  • Page 115 Those options may be different than the options required for the HP B4620B Source Correlation Tool Set. For example, do not use the “-nodbg” compiler option for an object file intended for use with the MULTI debugger.
  • Page 116 Chapter 5: Symbols and Source Code in the Analyzer Object File Symbols Microtec Research Inc. Compiler Options The following options should be used: Specifies to generate debugging information. Please refer to the language tool supplier’s documentation for more information about the options available. More information is available on the World Wide Web at: http://www.mentorg.com/microtec Solutions for CPU32...
  • Page 117: Source Code

    If you purchased a solution, the HP B4620B Source Correlation Tool Set was included. Otherwise, the source correlation tool set is available as an add-on product for the HP 16600A/16700A-series logic analysis system and must be licensed before you can use it (see the System Admin dialogs for information on licensing).
  • Page 118 All the information needed to reconstruct the complete address bus of the target system must be acquired by the logic analyzer. The HP E2480A analysis probe meets this requirement. The logic analyzer’s inverse assembler may need to reconstruct any incomplete address bus information and/or filter out any unexecuted instructions.
  • Page 119: Inverse Assembler Generated Pc (Software Address) Label

    Listing tool. This label is also known as the Software Address generated by the inverse assembler. The “Goto this line in listing” commands in the HP 16600A/16700A- series logic analysis system perform a pattern search on the PC label in the Listing display (when an inverse assembler is loaded).
  • Page 120: Access To Source Code Files

    Source File Search Path Verify that the correct file search paths for the source code have been entered into the source correlation tool set. The HP B4620B Source Correlation Tool Set can often read and access the correct source code file from information contained in the symbol file, if the source code files have not been moved since they were compiled.
  • Page 121: Triggering On Symbols And Source Code

    Chapter 5: Symbols and Source Code in the Analyzer Triggering on Symbols and Source Code Triggering on Symbols and Source Code When setting up trigger specifications to capture processor execution: • Use the logic analyzer trigger alignment to avoid missed triggers. •...
  • Page 122: To Correlate Relocatable Code Using The Address Offset

    Chapter 5: Symbols and Source Code in the Analyzer Triggering on Symbols and Source Code processor and your code. Example A common example of this is setting a trigger on the source line following a loop, for instance: Line # Addr C source Assembly Source...
  • Page 123 Chapter 5: Symbols and Source Code in the Analyzer Triggering on Symbols and Source Code Solutions for CPU32...
  • Page 124: Connecting And Configuring The Emulation Module

    Connecting and Configuring the Emulation Module...
  • Page 125: Connecting And Configuring The Emulation Module

    2 Install the emulation module in your logic analysis system, if necessary. (page 134) If you are connecting to an HP 16600A/700A-series logic analysis system, use the Setup Assistant to guide you through steps 3-6 (see page 19). Use this manual for additional information, if desired.
  • Page 126: Using The Emulation Control Interface

    Chapter 6: Connecting and Configuring the Emulation Module Using the Emulation Control Interface Using the Emulation Control Interface The Emulation Control Interface in your HP16600A/700A-series logic analysis system allows you to control an emulator (an emulation module or an emulation probe). As you set up the emulation module, you will use the Emulation Control Interface to: •...
  • Page 127 Chapter 6: Connecting and Configuring the Emulation Module Using the Emulation Control Interface analyzer to cause a break. Using a debugger with the Emulation Control Interface is not recommended because: • The interfaces can get out of synchronization when commands are issued from both interfaces.
  • Page 128: To Start The Emulation Control Interface From The Main System Window

    Chapter 6: Connecting and Configuring the Emulation Module Using the Emulation Control Interface To start the Emulation Control Interface from the main System window 1 In the System window, click the emulation module icon. 2 Select Start Session... To start the Emulation Control Interface from the Workspace window 1 Open the Workspace window.
  • Page 129 Chapter 6: Connecting and Configuring the Emulation Module Using the Emulation Control Interface 3 Right-click on the Emulator icon, then select Start Session... Solutions for CPU32...
  • Page 130: To Start The Emulation Control Interface From The Workspace Window For An Emulation Probe

    Chapter 6: Connecting and Configuring the Emulation Module Using the Emulation Control Interface To start the Emulation Control Interface from the Workspace window for an emulation probe If you have a stand-alone emulation probe connected to the logic analysis system via LAN, use the Emulation Probe icon instead of the Emulator icon.
  • Page 131: Designing A Target System For The Emulation Module

    Chapter 6: Connecting and Configuring the Emulation Module Designing a Target System for the Emulation Module Designing a Target System for the Emulation Module Debug port connections If you plan to connect the emulation module directly to the target system, the target system should have a debug port (BDM) connector. The connector should be a dual row header strip (“Berg connector”), 10 pins per inch, with 25 mil pins.
  • Page 132 Chapter 6: Connecting and Configuring the Emulation Module Designing a Target System for the Emulation Module The following signals should be available at the BDM port: BDM signal definitions Mnemonic Name Direction Signal Description Ground BKPT Breakpoint Input Signals a hardware breakpoint. Also used to (to target) place the CPU32 in background debug mode.
  • Page 133: 8-Pin Bdm Port

    Chapter 6: Connecting and Configuring the Emulation Module Designing a Target System for the Emulation Module 8-pin BDM port An 8-pin BDM port should be a dual row header strip ("Berg connector"), 4 pins per row, 10 pins per inch, with 25 mil pins. If you plan to use the 10-pin cable, use a header with 2 rows of 5 pins.
  • Page 134: Enabling Bdm

    Chapter 6: Connecting and Configuring the Emulation Module Designing a Target System for the Emulation Module Enabling BDM Your target system does not need to enable background debug mode. If the emulator is connected before you turn on the target system, the emulator will enable BDM.
  • Page 135: Installing The Emulation Module

    Chapter 6: Connecting and Configuring the Emulation Module Installing the Emulation Module Installing the Emulation Module Your emulation module may already be installed in your logic analysis system. If you need to install an emulation module yourself, follow the instructions on the pages which follow. CAUTION: These instructions are for trained service personnel.
  • Page 136: To Install The Emulation Module In An Hp16700A-Series Logic Analysis System Or An Hp16701A Expansion Frame

    Chapter 6: Connecting and Configuring the Emulation Module Installing the Emulation Module To install the emulation module in an HP16700A-series logic analysis system or an HP16701A expansion frame You will need T-10 and T-15 Torx screw drivers (supplied with the module).
  • Page 137 Chapter 6: Connecting and Configuring the Emulation Module Installing the Emulation Module 5 Install the emulation module. 6 Connect the cable and re-install the screws. You may connect the cable to either of the two connectors. If you have two emulation modules, note that many debuggers will work only with the “first”...
  • Page 138: To Install The Emulation Module In An Hp16600A-Series Logic Analysis System

    Chapter 6: Connecting and Configuring the Emulation Module Installing the Emulation Module To install the emulation module in an HP16600A-series logic analysis system You will need T-8, T-10, and T-15 Torx screw drivers (supplied with the emulation module). 1 Turn off the logic analysis system and REMOVE THE POWER CORD.
  • Page 139: To Test The Emulation Module

    Chapter 6: Connecting and Configuring the Emulation Module Installing the Emulation Module 4 Install the emulation module. 5 Connect the cable and re-install the screws. 6 Reinstall the cover. Tighten the screws snugly ( 2 N·m or 18 inch-pounds). 7 Plug in the power cord, reconnect the other cables, and turn on the logic analysis system.
  • Page 140: Connecting The Emulation Module To The Target System

    Choose one of the following methods for connecting the emulation module to a target system. • Directly through a debug port connector on the target board. • Through an HP E2480A analysis probe, which provides a direct connection to the debug port pins. Solutions for CPU32...
  • Page 141: To Connect To A Target System Using A 10-Pin Debug Port

    Chapter 6: Connecting and Configuring the Emulation Module Connecting the Emulation Module to the Target System After you have connected the emulation module to your target system, you may need to update the firmware in the emulation module. For information on designing a debug port on your target board, see See Also page 130.
  • Page 142: To Connect To A Target System Via An 8-Pin Debug Port

    Chapter 6: Connecting and Configuring the Emulation Module Connecting the Emulation Module to the Target System CAUTION: Be careful to orient the connector as shown below. If the connector is rotated, your target system or the emulation module may be damaged. 6 Turn on the power to the logic analysis system, then turn on the power to the target system.
  • Page 143 Chapter 6: Connecting and Configuring the Emulation Module Connecting the Emulation Module to the Target System 4 Plug one end of the 10-pin cable into the target interface module. 5 Plug the other end of the 10-pin cable into the target system. Orient the red wire toward pin 1 of the connector.
  • Page 144: To Connect To A Target System Using An Analysis Probe

    Chapter 6: Connecting and Configuring the Emulation Module Connecting the Emulation Module to the Target System To connect to a target system using an analysis probe 1 Remove power from the target system. 2 Plug one end of the 50-pin cable into the emulation module. The connectors are keyed.
  • Page 145: To Update Firmware

    • The emulation module was not shipped already installed in the logic analysis system, or • You have an updated version of the firmware from HP. To update the firmware: 1 End any run control sessions which may be running.
  • Page 146: To Display Current Firmware Version Information

    Chapter 6: Connecting and Configuring the Emulation Module To update firmware To display current firmware version information Display Current Version • In the Update Firmware window, click There are usually two firmware version numbers: one for “Generics” and one for the personality of your processor. To verify communication between the emulator and target system 1 Turn on the target system.
  • Page 147: Configuring The Emulation Module

    • the emulation module’s built-in terminal interface • your debugger, if it provides an “emulator configuration” window which can be used with this HP emulation module What can be configured The following options can be configured using the Emulation Control Interface or using built-in commands: •...
  • Page 148: To Configure Using The Emulation Control Interface

    Chapter 6: Connecting and Configuring the Emulation Module Configuring the Emulation Module To configure using the Emulation Control Interface The easiest way to configure the emulation module is to use the Emulation Control Interface. 1 Start an Emulation Control Interface session. In the system window, click the Emulation Control Interface icon, and then select Start Session..
  • Page 149: To Configure Using The Built-In Commands

    Chapter 6: Connecting and Configuring the Emulation Module Configuring the Emulation Module Help©Help on this window in the Configuration window for See Also information on each of the configuration options. Help in the Emulation Control Interface menu for help on starting an Emulation Control session.
  • Page 150: To Configure Using A Debugger

    - Select BNC trigger output option M> To configure using a debugger Because the HP emulation module can be used with several third-party debuggers, specific details for sending the configuration commands from the debugger to the emulation module cannot be given here.
  • Page 151: To Configure The Processor Type

    Chapter 6: Connecting and Configuring the Emulation Module Configuring the Emulation Module To configure the processor type Processor type configuration Value Built-in command Notes CPU32 Processor Types 68330 cf proc=68330 68331 cf proc=68331 68332 cf proc=68332 68333 cf proc=68333 68334 cf proc=68334 68335 cf proc=68335...
  • Page 152: To Configure The Processor Clock Speed (Bdm Communication Speed)

    Chapter 6: Connecting and Configuring the Emulation Module Configuring the Emulation Module will allow display and modification from the user interface. For example, when 68332 is selected as the processor type, the interface will support direct access to the SIM, the QSM, the TPU, and the TPURAM registers.
  • Page 153: To Set The Default Clock Rate If The Processor Clock Rate Is Less Than 8 Mhz

    Chapter 6: Connecting and Configuring the Emulation Module Configuring the Emulation Module Processor clock speed configuration Processor clock Value Built-in command is at least 33 MHz cf procck=33 25 MHz cf procck=25 20 MHz cf procck=20 16 MHz cf procck=16 8 MHz (default) cf procck=8 4 MHz...
  • Page 154 Chapter 6: Connecting and Configuring the Emulation Module Configuring the Emulation Module 4 Select the clock rate. 5 Click Apply, then click Close. If a target system’s processor clock rate is less than 8 MHz following powerup, the default clock rate must be set to 131 kHz. This can occur when the target system has the processor running off of an external clock source that is less than 8 MHz or is using the clock synthesizer with a crystal that is lower in frequency that the standard...
  • Page 155: Detailed Information About Processor Clock Rates

    Chapter 6: Connecting and Configuring the Emulation Module Configuring the Emulation Module Detailed information about processor clock rates Most target systems will communicate with the emulator properly and with excellent performance following the basic guidelines given in the preceding sections. In some target systems, the setting of this parameter requires greater knowledge of the actual clock generation model.
  • Page 156 Chapter 6: Connecting and Configuring the Emulation Module Configuring the Emulation Module initialization code that runs on the target system from reset is required to set the SYNCR to the correct value. When the target processor clock rate is fixed through the use of an external clock source, the Processor Clock Rate parameter can be set to the highest rate that is equal to or less than the target clock rate.
  • Page 157: To Configure Restriction To Real-Time Runs

    Chapter 6: Connecting and Configuring the Emulation Module Configuring the Emulation Module To configure restriction to real-time runs Real-time runs configuration Built-in Value Emulation module configuration command Allows commands which break to the cf rrt=no monitor. Examples include commands which display memory or registers. (Default) No commands are allowed which cf rrt=yes...
  • Page 158: Testing The Emulator And Target System

    Chapter 6: Connecting and Configuring the Emulation Module Testing the emulator and target system Testing the emulator and target system After you have connected and configured the emulator, you should perform some simple tests to verify that everything is working. Chapter 13, “Troubleshooting the Emulation Module,”...
  • Page 159 Chapter 6: Connecting and Configuring the Emulation Module Testing the emulator and target system RAM or flash memory. 3 Use the Breakpoints window to set breakpoints. Use the Registers window to initialize register values. The new register or breakpoint values are sent to the processor when you press the Enter key or when you move the cursor out of the selected register field.
  • Page 160: Using Internal Registers (Sim And Emsim Registers)

    Using Internal Registers (SIM and EMSIM Registers)
  • Page 161: Internal Registers (Sim And Emsim Registers)

    Chapter 7: Using Internal Registers (SIM and EMSIM Registers) Internal Registers (SIM and EMSIM Registers) Internal Registers (SIM and EMSIM Registers) The purpose of SIM Registers The CPU32 family of processors provides a variety of internal peripheral and memory modules that are directly connected to the CPU32 core through an internal bus.
  • Page 162: Configuring The Sim Registers

    Chapter 7: Using Internal Registers (SIM and EMSIM Registers) Configuring the SIM Registers Configuring the SIM Registers Summary If you have a boot ROM that initializes the SIM registers, you don’t have to configure the EMSIM registers in order to load code and run your target.
  • Page 163: The Effect Of Processor Type On The Emsim Registers

    Chapter 7: Using Internal Registers (SIM and EMSIM Registers) Configuring the SIM Registers Based on the previous discussion, it should be clear that the EMSIM values specified during configuration need to match the intended programming and of use of your CPU32 target system. You need to carefully decide how the processor will be configured and the corresponding SIM values.
  • Page 164: Configuring Emsim Register Values

    Chapter 7: Using Internal Registers (SIM and EMSIM Registers) Configuring EMSIM Register Values Configuring EMSIM Register Values There are two methods you can use to configure EMSIM register values: • Copy values from the SIMs into the EMSIM registers, or •...
  • Page 165 Chapter 7: Using Internal Registers (SIM and EMSIM Registers) Configuring EMSIM Register Values 3 Open the Workspace window and select File©Save Configuration... The EMSIM values will be saved as part of the configuration. This allows you to restore the EMSIM values by loading the configuration. Solutions for CPU32...
  • Page 166: Configuring Sim Register Values

    Chapter 7: Using Internal Registers (SIM and EMSIM Registers) Configuring SIM Register Values Configuring SIM Register Values There are three ways to configure the values of the SIM registers: • Using code in your target’s boot ROM, or • Copying values from the EMSIM registers into the SIM registers, or •...
  • Page 167: To Manually Define Sim Values

    Chapter 7: Using Internal Registers (SIM and EMSIM Registers) Configuring SIM Register Values 2 Break the target processor. Some registers can only be written once after processor reset. If you set the EMSIM values, then reset and break, the EMSIM values will be written to the SIM registers.
  • Page 168: Saving And Loading Emsim Values

    Chapter 7: Using Internal Registers (SIM and EMSIM Registers) Saving and Loading EMSIM Values Saving and Loading EMSIM Values You can use the Emulation Control Interface to save the EMSIM values to a configuration file then to restore the EMSIM values. The configuration file contains more than just the EMSIM values.
  • Page 169 Chapter 7: Using Internal Registers (SIM and EMSIM Registers) Saving and Loading EMSIM Values 3 Select a file name and click Load. This will not change the SIM registers. To apply the new values to the corresponding SIM registers, see “To copy EMSIM registers to target SIM registers”...
  • Page 170: Configuring Sim And Emsim Values Using Built-In Commands

    Chapter 7: Using Internal Registers (SIM and EMSIM Registers) Configuring SIM and EMSIM Values Using Built-In Commands Configuring SIM and EMSIM Values Using Built- In Commands To compare SIM and EMSIM registers Target SIM registers may compared to the the EMSIM to determine if they have changed.
  • Page 171: Summary Of Emsim-Related Built-In Commands

    Chapter 7: Using Internal Registers (SIM and EMSIM Registers) Configuring SIM and EMSIM Values Using Built-In Commands Summary of EMSIM-related built-in commands Command Meaning Copy values from SIM registers to EMSIM registers sync sim Copy values from EMSIM registers to SIM registers sync emsim Display differences between SIM and EMSIM registers sync diff...
  • Page 172 Chapter 7: Using Internal Registers (SIM and EMSIM Registers) Internal Representation of SIM and EMSIM Registers Internal Representation of SIM and EMSIM Registers Internal to the emulator the EMSIM and SIM memory spaces are accessed using memory suffixes of the form offset@emsim and offset@reg.
  • Page 173 Chapter 7: Using Internal Registers (SIM and EMSIM Registers) Internal Representation of SIM and EMSIM Registers Solutions for CPU32...
  • Page 174 Using the Emulator with a Debugger...
  • Page 175 Using the Emulator with a Debugger Several prominent companies design and sell state-of-the-art source debuggers which work with the HP emulation module and emulation probe. Benefits of using a debugger The debugger will enable you to control the execution of your processor from the familiar environment of your debugger.
  • Page 176 Chapter 8: Using the Emulator with a Debugger Using the Emulator with a Debugger Here is an example of what the display on your PC or workstation might look like: Solutions for CPU32...
  • Page 177 PC or workstation screen, along with the debugger. Is your debugger compatible with the emulator? Ask your debugger vendor whether the debugger can be used with an HP emulation module or HP emulation probe (also known as a "processor probe" or "software probe"). LAN connection You will use a LAN connection to allow the debugger to communicate with the emulator.
  • Page 178 Chapter 8: Using the Emulator with a Debugger Setting up Debugger Software Setting up Debugger Software The instructions in this manual assume that your PC or workstation is already connected to the LAN, and that you have already installed the debugger software according to the debugger vendor’s documentation.
  • Page 179 Port numbers for emulators Port number Use for Debugger connections 6470 Slot 1 (First emulator in an HP 1660A/700A-series logic analysis system) 6474 Slot 2 (Second emulator in an HP 16700A-series system) 6478 Slot 3 (Third emulator in an expansion frame)
  • Page 180 Chapter 8: Using the Emulator with a Debugger Setting up Debugger Software Write the information here for future reference: IP Address of Logic Analysis System ___________________________ LAN Name of Logic Analysis System ___________________________ Gateway Address ___________________________ Port Number of Emulator ___________________________ Solutions for CPU32...
  • Page 181 Chapter 8: Using the Emulator with a Debugger Setting up Debugger Software To change the port number of an emulator Some debuggers do not provide a means to specify a port number. In that case, the debugger will always connect to port 6470 (the first emulator).
  • Page 182 Chapter 8: Using the Emulator with a Debugger Setting up Debugger Software To verify communication with the emulator 1 Telnet to the IP address. For example, on a UNIX system, enter “telnet <IP_address> 6472”. This connection will give you access to the emulator’s built-in terminal interface.
  • Page 183 $ xhost +mylogic $ telnet mylogic Trying... Connected to mylogic.mycompany.com. Escape character is ‘^]’. Local flow control on Telnet TERMINAL-SPEED option ON HP Logic Analysis System Please Log in as: hplogic [displayname:0] login: hplogic Connection closed by foreign host. Solutions for CPU32...
  • Page 184 Chapter 8: Using the Emulator with a Debugger Setting up Debugger Software To export the logic analysis system’s display to a PC By exporting the logic analyzer’s display, you can see and use the logic analysis system’s windows on the screen of your PC. To do this, you must have telnet software and an X terminal emulator installed on your computer.
  • Page 185 Hills Software, Inc. is one of several debuggers which connect to the HP emulation module. This section provides information that is specific to using MULTI with the HP emulation module. It is intended to be used in conjunction with the MULTI documentation provided by Green Hills Software. Overview MULTI connects to an emulation module through the Green Hills host- resident program (hpserv).
  • Page 186 Chapter 8: Using the Emulator with a Debugger Using the Green Hills debugger follow these steps: a Prepare the executable. Go to the 68000PC subdirectory where you installed MULTI. Copy the default.lnk file to user.lnk. b Start MULTI. On Unix, enter "multi". On Windows, double-click the Green Hills icon.
  • Page 187 Builder window. 5 Configure the emulation module and target system. Before running the target processor, you must configure the HP emulation module for your target system. For example, you may have to set the BDM clock speed, the reset operation, cache disabling, or other configuration parameters.
  • Page 188 Chapter 8: Using the Emulator with a Debugger Using the Green Hills debugger configuration commands in a script. 6 Specify an initialization address for the stack pointer. This is required if the stack pointer is neither initialized when the processor is reset nor set in the start-up code generated by the compiler.
  • Page 189 Chapter 8: Using the Emulator with a Debugger Using the Green Hills debugger To configure the emulation module, analysis probe, and target using an initialization script You can use an initialization script to configure the emulation module and set up your target system. If you will always be using the same configuration, this way will save time and reduce errors.
  • Page 190 Chapter 8: Using the Emulator with a Debugger Using the Green Hills debugger Example: script to configure EMSIM and SIM registers The following script was written for a target which does not have boot ROM and which is connected to an analysis probe. The script sets the EMSIM registers, then copies the EMSIM values to the target processor (sync emsim) and to the analysis probe (pp load) to enable address reconstruction.
  • Page 191 Chapter 8: Using the Emulator with a Debugger Using the Green Hills debugger To perform common debugger tasks regs • To display registers, click the button in the Display window. • To set a breakpoint, click on the source code line where the breakpoint is to be located.
  • Page 192 Chapter 8: Using the Emulator with a Debugger Using the Green Hills debugger NOTE: logging commands in this way may result in a VERY large file. Beware of the disk space it may require. To reinitialize the system If you suspect that the emulation module is out of sync with the MULTI debugger, you may want to reinitialize it.
  • Page 193 Chapter 8: Using the Emulator with a Debugger Using the Green Hills debugger Guide. Using MULTI with the Hewlett-Packard Processor Probe from Green Hills Software, Inc. The Green Hills web site: http://www.ghs.com “Configuring the Emulation Module” on page 146 for more information on configuration options and the "cf"...
  • Page 194 Systems, Inc. is one of several debuggers which connect to the HP emulation module. This section provides information that is specific to using SingleStep with the HP emulation module. It is intended to be used in conjunction with the SingleStep documentation provided by SDS. Overview...
  • Page 195 Start SingleStep running on your PC or workstation. b When the small Debug dialog box appears in the middle of the screen, click the Connection tab and then enter the IP address of the HP logic analysis system which contains the emulation module. File©Debug...
  • Page 196 Chapter 8: Using the Emulator with a Debugger Using the Software Development Systems debugger performs this initialization. However, when SingleStep resets the target, it immediately places the processor in debug mode. Any initialization code which may exist on the target board has not been run.
  • Page 197 Chapter 8: Using the Emulator with a Debugger Using the Software Development Systems debugger Example If you load the est360.wsp and set up the Debug Dialog options for the target you are connecting to, when you click OK, the file 68360.cfg will be created and place in the cmd directory.
  • Page 198 Chapter 8: Using the Emulator with a Debugger Using the Software Development Systems debugger the SIM registers before issuing these two commands. “control –c” is used by SingleStep to forward a command to the emulation module. For help on either the “sync sim” or “pp load” command, issue the commands, control –c “help sync”...
  • Page 199 Chapter 8: Using the Emulator with a Debugger Using the Software Development Systems debugger # write -b SD:0x0100100C = 0x8C # CLKOCR # write -w SD:0x01001010 = 0x8000 # PLLCR # write -w SD:0x01001014 = 0x0000 # CDVCR # write -w SD:0x01001016 = 0x00A0 # PEPAR # write -w SD:0x01001026 = 0x070F # PICR...
  • Page 200 Chapter 8: Using the Emulator with a Debugger Using the Software Development Systems debugger In summary, there are two ways for you to configure the emulation module and your target. The first method consisted of loading an existing workspace, using the Debug Dialog to modify any items needed followed by clicking the OK button and having it create a corresponding .cfg file.
  • Page 201 Chapter 8: Using the Emulator with a Debugger Using the Software Development Systems debugger specific to initializing the processor. It is executed each time the processor is reset. The value of the _reset alias can be viewed by issuing a "alias _reset"...
  • Page 202 Chapter 8: Using the Emulator with a Debugger Using the Software Development Systems debugger control-c. Examples To see the speed that the emulation module is using to communicate with the target system you would issue the following command in the SingleStep command window: control -c "cf procck"...
  • Page 203 Chapter 8: Using the Emulator with a Debugger Using the Software Development Systems debugger Error conditions "!ERROR 800! Invalid command: bcast" usually means that there is not a target interface module (TIM) connected to the emulation module or the emulation module does not have firmware for the CPU32 family. Verify that the emulation module is connected to the target.
  • Page 204 Using the Analysis Probe and Emulation Module Together...
  • Page 205 • Your debugger, to control your target system using the emulation module. Do not use the debugger at the same time as the Emulation Control Interface. • The HP B4620B Source Correlation Tool Set, to relate the analysis trace to your high-level source code. Which assembly-level listing should I use? Several windows display assembly language instructions.
  • Page 206 Use the Source Viewer to set analyzer triggers. The Source Viewer window is available only if you have licensed the HP B4620B Source Correlation Tool Set. • Your debugger shows which line of code corresponds to the current value of the program counter on your target system.
  • Page 207 (Source Viewer window) If you have the HP B4620B Source Correlation Tool Set, you can easily stop the processor when a particular line of code is reached. 1 In the Source window, click on the line of source code where you...
  • Page 208 To stop the processor when the logic analyzer triggers (Intermodule window) Use the Intermodule window if you do not have the HP B4620B Source Correlation Tool Set or if you need to use a more sophisticated trigger than is possible in the Source Viewer window.
  • Page 209 Chapter 9: Using the Analysis Probe and Emulation Module Together Triggering the Emulation Module from the Analyzer 3 Click in the Source window (or other logic analyzer Group Run window). 4 If your target system is not already running, click in the emulation Run Control window to start your target.
  • Page 210 Chapter 9: Using the Analysis Probe and Emulation Module Together Triggering the Emulation Module from the Analyzer clock to stop. Therefore most intermodule measurements will have to be stopped to see the measurement. Example An intermodule measurement has been set up where the analyzer is triggering the emulation module.
  • Page 211 Chapter 9: Using the Analysis Probe and Emulation Module Together Tracing until the processor halts Tracing until the processor halts If you are using a state analyzer, you can begin a trace, run the processor, then manually end the trace when the processor has halted. To halt the processor, you can set a breakpoint using the Emulation Control Interface or a debugger.
  • Page 212 Chapter 9: Using the Analysis Probe and Emulation Module Together Triggering the Logic Analyzer from the Emulation Module Triggering the Logic Analyzer from the Emulation Module You can create an intermodule measurement which will allow the emulation module to trigger another module such as a timing analyzer or oscilloscope.
  • Page 213 Chapter 9: Using the Analysis Probe and Emulation Module Together Triggering the Logic Analyzer from the Emulation Module Group Run The intermodule bus signals can still be active even without a Group Run. The following setups can operate independently of Group Run: •...
  • Page 214 Chapter 9: Using the Analysis Probe and Emulation Module Together Triggering the Logic Analyzer from the Emulation Module For example, suppose you have the following IMB measurement set up: Clicking the Group Run button (at the very top of the Intermodule window or a logic analyzer window) will start the analyzer running.
  • Page 215 Chapter 9: Using the Analysis Probe and Emulation Module Together Triggering the Logic Analyzer from the Emulation Module If you define a trigger on some state and the debugger happens to read the same state, then you may falsely trigger your analyzer measurement.
  • Page 216 Chapter 9: Using the Analysis Probe and Emulation Module Together Triggering the Logic Analyzer from the Emulation Module using a state analyzer on the processor bus the status may never change upon receiving the emulation module trigger (analysis arm). This occurs because the qualified processor clock needed to switch the state analyzer to the next state is stopped.
  • Page 217 Chapter 9: Using the Analysis Probe and Emulation Module Together Triggering the Logic Analyzer from the Emulation Module If you are going to run the emulation module from Reset you must do a Reset followed by Break to properly set the breakpoints. The Reset will clear all on-chip hardware breakpoint registers.
  • Page 218 Hardware Reference...
  • Page 219 This chapter contains additional reference information including the specifications and characteristics for the analysis probe and the emulation probe, as well as signal mapping for the HP E2480A analysis probe. It consists of the following information: • Analysis probe reference •...
  • Page 220 Mandatory 4 for state. Up to 8 for timing. Probes Required Logic Analyzers HP 16600A, HP 16601A, HP 16602A, HP 16603A, HP 16550A (one or two cards), HP 16554A/55A/56A (one or two cards), HP 16555D/56D/ Supported 57D (one or two cards), HP 1660A/AS/C/CS/CP, HP 1661A/AS/C/CS/ CP, HP 1662A/AS/C/CS/CP, HP 1670A/D, HP 1671A/D, HP 1672A/D See chapter 1 for available accessories.
  • Page 221 When CPU32 microcontrollers are reconfigured, they can present special problems for debugging. This is especially true when address bits A[19:23] are reconfigured as chip selects. The HP E2480A analysis probe overcomes these problems by using information in the base address register associated with such chip selects to replace the missing address bits.
  • Page 222 • Code captured in a trace can be correlated with mnemonics in the source database. • Alignment of activity shown in a trace list. The HP E2480A also reconstructs function control bits FC[0:2] when they are configured as chip selects, and SIZ[0:1] and DSAck[0:1] when they are configured as general I/O.
  • Page 223 Chapter 10: Hardware Reference Analysis probe—operating characteristics Address Reconstruction Overview Solutions for CPU32...
  • Page 224 Chapter 10: Hardware Reference Analysis probe signal-to-connector mapping (Timing) Analysis probe signal-to-connector mapping (Timing) The following table shows the flow of signals from the microcontroller through the E2480A timing connectors to the logic analyzer. In addition to being grouped along microcontroller-like functions, the signals are also grouped and ordered along their microcontroller port definitions.
  • Page 225 Chapter 10: Hardware Reference Analysis probe signal-to-connector mapping (Timing) E2480A CPU32 SIGNAL TIMING ANALYZER TIMING TIMING NAME CONNECTOR LABEL SUBLABEL Timing Connector J5, Timing Pod 2 ~BR/CS0 STAT ~BG/CS1 STAT ~BGAck/CS2 STAT DSAck0 STAT PORT E DSAck1 STAT PORT E ~AVec STAT PORT E...
  • Page 226 Chapter 10: Hardware Reference Analysis probe signal-to-connector mapping (Timing) E2480A CPU32 SIGNAL TIMING ANALYZER TIMING TIMING NAME CONNECTOR LABEL SUBLABEL Timing Connector J4, Timing Pod 3 ADDR0 ADDR ADDR1 ADDR ADDR2 ADDR ADDR3 ADDR PORT B ADDR4 ADDR PORT B ADDR5 ADDR PORT B...
  • Page 227 Chapter 10: Hardware Reference Analysis probe signal-to-connector mapping (Timing) E2480A CPU32 SIGNAL TIMING ANALYZER TIMING TIMING NAME CONNECTOR LABEL SUBLABEL Timing Connector J4, Timing Pod 4 ADDR16 ADDR PORT A ADDR17 ADDR PORT A ADDR18 ADDR PORT A FC0/CS3 PORT C, CSx FC1/CS4 PORT C, CSx FC2/CS5...
  • Page 228 Chapter 10: Hardware Reference Analysis probe signal-to-connector mapping (Timing) E2480A CPU32 SIGNAL TIMING ANALYZER TIMING NAME CONNECTOR LABEL Timing Connector J2, Timing Pod 5 336, 376 MISO PORT Q MOSI PORT Q PORT Q PCS0/SS PORT Q PCS1 PORT Q PCS2 PORT Q PCS3...
  • Page 229 Chapter 10: Hardware Reference Analysis probe signal-to-connector mapping (Timing) E2480A TIMING ANALYZER TIMING CPU32 SIGNAL NAME CONNECTOR LABEL Timing Connector J2, Timing Pod 6 376, 336, 335, 334, OC1/OC2 OC1/OC3 OC1/OC4 OC1/OC5/IC4 TP10 TP11 TP12 TP13 TP14 PWMA TP15 PWMB T2clk PClk Solutions for CPU32...
  • Page 230 Chapter 10: Hardware Reference Analysis probe signal-to-connector mapping (Timing) E2480A TIMING ANALYZER TIMING CPU32 SIGNAL NAME CONNECTOR LABEL Timing Connector J3, Timing Pod 7 336, 376 335, 334, 332, 331 ModClk ModClk PORT F IRQ1 IRQ1 PORT F IRQ2 IRQ2 PORT F IRQ3 IRQ3...
  • Page 231 Chapter 10: Hardware Reference Analysis probe signal-to-connector mapping (Timing) E2480A TIMING ANALYZER TIMING CPU32 SIGNAL NAME CONNECTOR LABEL Timing Connector J3, Timing Pod 8 336, 376 335, 332, A2D_A0 A2D_A1 A2D_A2 A2D_A3 A2D_A4 A2D_A5 A2D_A6 A2D_A7 VDDA MISO PORT Q* A2D_B0 VSSA MOSI...
  • Page 232 Chapter 10: Hardware Reference State connector signal definition State connector signal definition The following table defines the state connectors, the logic analyzer bit assignments, and the label/sublabel(s) to which a signal belongs. This table aids in reconfiguring the logic analyzer to match a particular microcontroller configuration.
  • Page 233 Chapter 10: Hardware Reference State connector signal definition E2480A CPU32 SIGNAL STATE ANALYZER STATE STATE NAME CONNECTOR LABEL SUBLABEL State Connector J1, State Pod 2 ~SHOW_CYCLE STAT ~ShoCy R/~W STAT R/~W ~INST_FETCH STAT ~IFtch ~PIPE_FLUSH STAT ~PFlsh SIZ0 STAT SIZx SIZ1 STAT SIZx...
  • Page 234 Chapter 10: Hardware Reference State connector signal definition E2480A CPU32 STATE ANALYZER STATE STATE SIGNAL CONNECTOR LABEL SUBLABEL NAME State Connector J6, State Pod 3 ADDR0 ADDR ADDR1 ADDR ADDR2 ADDR ADDR3 ADDR ADDR4 ADDR ADDR5 ADDR ADDR6 ADDR ADDR7 ADDR ADDR8 ADDR...
  • Page 235 Chapter 10: Hardware Reference State connector signal definition E2480A STATE CPU32 SIGNAL ANALYZER STATE STATE CONNECTOR NAME LABEL SUBLABEL State Connector J6, State Pod 4 ADDR16 ADDR ADDR17 ADDR ADDR18 ADDR ADDR19 ADDR ADDR20 ADDR ADDR21 ADDR ADDR22 ADDR ADDR23 ADDR ~BGAck Solutions for CPU32...
  • Page 236 Chapter 10: Hardware Reference Emulation module—operating characteristics Emulation module—operating characteristics The following operating characteristics are not specifications, but are typical operating characteristics for the HP 16610A emulation module and CPU32 target interface module. Operating Characteristics Motorola 68330, 68331, 68332, 68F333, 68334, 68335,...
  • Page 237 Chapter 10: Hardware Reference Emulation module—electrical characteristics Emulation module—electrical characteristics Characteristic Symbol Value Unit Supply Voltage from Target -0.3 to +5.5 = 5 Volts = 3.3 Volts Characteristic Symbol Unit Input Current (V Input Voltage -0.5 +0.5 -0.5 +0.5 Input High Voltage +0.5 +0.5 Input Low Voltage...
  • Page 238 General-Purpose ASCII (GPA) Symbol File Format...
  • Page 239 Chapter 11: General-Purpose ASCII (GPA) Symbol File Format General-Purpose ASCII (GPA) Symbol File Format General-Purpose ASCII (GPA) Symbol File Format General-purpose ASCII (GPA) format files are loaded into a logic analyzer just like other object files, but they are usually created differently.
  • Page 240 Chapter 11: General-Purpose ASCII (GPA) Symbol File Format General-Purpose ASCII (GPA) Symbol File Format Example main 00001000..00001009 test 00001010..0000101F var1 00001E22 #this is a variable This example defines two symbols that correspond to address ranges and one point symbol that corresponds to a single address. For more detailed descriptions of GPA file records and associated symbol definition syntax, refer to these topics that follow: •...
  • Page 241 Chapter 11: General-Purpose ASCII (GPA) Symbol File Format General-Purpose ASCII (GPA) Symbol File Format GPA Record Format Summary [SECTIONS] section_name start..end attribute [FUNCTIONS] func_name start..end [VARIABLES] var_name start [size] var_name start..end [SOURCE LINES] File: file_name line# address [START ADDRESS] address #Comments If no record header is specified, [VARIABLES] is assumed.
  • Page 242 Chapter 11: General-Purpose ASCII (GPA) Symbol File Format General-Purpose ASCII (GPA) Symbol File Format [SOURCE LINES] File: main.c 00001000 00001002 0000100A 0000101E File: test.c 00001010 00001012 0000101A Solutions for CPU32...
  • Page 243 Chapter 11: General-Purpose ASCII (GPA) Symbol File Format General-Purpose ASCII (GPA) Symbol File Format SECTIONS [SECTIONS] section_name start..end attribute Use SECTIONS to define symbols for regions of memory, such as sections, segments, or classes. A symbol representing the name of the section. section_name The first address of the section, in hexadecimal.
  • Page 244 Chapter 11: General-Purpose ASCII (GPA) Symbol File Format General-Purpose ASCII (GPA) Symbol File Format FUNCTIONS [FUNCTIONS] func_name start..end Use FUNCTIONS to define symbols for program functions, procedures, or subroutines. A symbol representing the function name. func_name The first address of the function, in hexadecimal. start The last address of the function, in hexadecimal.
  • Page 245 Chapter 11: General-Purpose ASCII (GPA) Symbol File Format General-Purpose ASCII (GPA) Symbol File Format VARIABLES [VARIABLES] var_name start [size] var_name start..end You can specify symbols for variables either by using the address of the variable, the address and the size of the variable, or a range of addresses occupied by the variable.
  • Page 246 Chapter 11: General-Purpose ASCII (GPA) Symbol File Format General-Purpose ASCII (GPA) Symbol File Format SOURCE LINES [SOURCE LINES] File: file_name line# address Use SOURCE LINES to associate addresses with lines in your source files. The name of a file. file_name The number of a line in the file, in decimal.
  • Page 247 Chapter 11: General-Purpose ASCII (GPA) Symbol File Format General-Purpose ASCII (GPA) Symbol File Format START ADDRESS [START ADDRESS] address The address of the program entry point, in hexadecimal. address Example [START ADDRESS] 00001000 Comments #comment text Use the # character to include comments in a file. Any text following the # character is ignored.
  • Page 248 Troubleshooting the Analysis Probe...
  • Page 249 Chapter 12: Troubleshooting the Analysis Probe Troubleshooting the Analysis Probe Troubleshooting the Analysis Probe If you encounter difficulties while making measurements, use this chapter to guide you through some possible solutions. Each heading lists a problem you may encounter, along with some possible solutions. If you still have difficulty using the analyzer after trying the suggestions in this chapter, please contact your local Hewlett-Packard service center.
  • Page 250 Chapter 12: Troubleshooting the Analysis Probe Logic Analyzer Problems Logic Analyzer Problems This section lists general problems that you might encounter while using the logic analyzer. Intermittent data errors This problem is usually caused by poor connections, incorrect signal levels, or marginal timing. ❏...
  • Page 251 Chapter 12: Troubleshooting the Analysis Probe Logic Analyzer Problems Unwanted triggers Unwanted triggers can be caused by instructions that were fetched but not executed. ❏ Add the prefetch queue or pipeline depth to the trigger address to avoid this problem. The logic analyzer captures prefetches, even if they are not executed.
  • Page 252 Chapter 12: Troubleshooting the Analysis Probe Logic Analyzer Problems Analyzer won’t power up If logic analyzer power is cycled when the logic analyzer is connected to a target system or emulation probe that remains powered up, the logic analyzer may not be able to power up. Some logic analyzers are inhibited from powering up when they are connected to a target system or emulation probe that is already powered up.
  • Page 253 Chapter 12: Troubleshooting the Analysis Probe Analysis Probe Problems Analysis Probe Problems This section lists problems that you might encounter when using an analysis probe. If the solutions suggested here do not correct the problem, you may have a damaged analysis probe. Contact your local Hewlett-Packard Sales Office if you need further assistance.
  • Page 254 Chapter 12: Troubleshooting the Analysis Probe Analysis Probe Problems Erratic trace measurements ❏ Do a full reset of the target system before beginning the measurement. Some analysis probe designs require a full reset to ensure correct configuration. ❏ Ensure that your target system meets the timing requirements of the processor with the analysis probe installed.
  • Page 255 Chapter 12: Troubleshooting the Analysis Probe Inverse Assembler Problems Inverse Assembler Problems This section lists problems that you might encounter while using the inverse assembler. When you obtain incorrect inverse assembly results, it may be unclear whether the problem is in the analysis probe or in your target system. If you follow the suggestions in this section to ensure that you are using the analysis probe and inverse assembler correctly, you can proceed with confidence in debugging your target system.
  • Page 256 Chapter 12: Troubleshooting the Analysis Probe Inverse Assembler Problems file. Do not change the names of these labels or the bit assignments within the labels. Some analysis probes also require other data labels. See Chapter 10, “Hardware Reference,” beginning on page 217 for more information.
  • Page 257 Chapter 12: Troubleshooting the Analysis Probe Intermodule Measurement Problems Intermodule Measurement Problems Some problems occur only when you are trying to make a measurement involving multiple modules. An event wasn’t captured by one of the modules If you are trying to capture an event that occurs very shortly after the event that arms one of the measurement modules, it may be missed due to internal analyzer delays.
  • Page 258 Ensure that the inverse assembler file is not renamed or deleted, and that it is located in the the correct directory: • For HP 16600A/700A-series logic analysis systems it should be in /hplogic/ • For other logic analyzers it should be in the same directory as the configuration file.
  • Page 259 “Measurement Initialization Error” This error occurs when you have installed the cables incorrectly for one or two HP 16550A logic analysis cards. The following diagrams show the correct cable connections for one-card and two-card installations. Ensure that your cable connections match the silk screening on the card, and that they are fully seated in the connectors.
  • Page 260 Analysis Probe Messages Cable Connections for Two-Card HP 16550A Installations See Also The HP 16550A 100-MHz State/500-MHz Timing Logic Analyzer Service Guide. “No Configuration File Loaded” This is usually caused by trying to load a configuration file for one type of module/system into a different type of module/system.
  • Page 261 “Time from Arm Greater Than 41.93 ms” The HP 16550A state/timing analyzers have a counter to keep track of the time from when an analyzer is armed to when it triggers. The width and clock rate of this counter allow it to count for up to 41.93 ms before it overflows.
  • Page 262 Chapter 12: Troubleshooting the Analysis Probe Analysis Probe Messages “Waiting for Trigger” If a trigger pattern is specified, this message indicates that the specified trigger pattern has not occurred. Verify that the triggering pattern is correctly set. ❏ When analyzing microcontrollers that fetch only from word-aligned addresses, ensure that the trigger condition is set to look for an opcode fetch at an address corresponding to a word boundary.
  • Page 263 2 In the U.S., call 1-800-403-0801. Outside the U.S., call your nearest HP sales office. Ask them for the address of the nearest HP service center. 3 Package the part and send it to the HP service center.
  • Page 264 Returning Parts to Hewlett-Packard for Service In some parts of the world, on-site repair service is available. Ask the HP sales or service representative for details. To obtain replacement parts The following table lists some parts that may be replaced if they are damaged or lost.
  • Page 265 Chapter 12: Troubleshooting the Analysis Probe Cleaning the Instrument Cleaning the Instrument If the instrument requires cleaning: 1 Remove power from the instrument. 2 Clean the instrument with a mild detergent and water. 3 Make sure that the instrument is completely dry before reconnecting it to a power source.
  • Page 266 Troubleshooting the Emulation Module...
  • Page 267 Chapter 13: Troubleshooting the Emulation Module Solving Problems Solving Problems If you have problems with the emulation module, your first task is to determine the source of the problem. Problems may originate in any of the following places: • The connection between the emulation module and your debugger •...
  • Page 268 Chapter 13: Troubleshooting the Emulation Module Solving Problems Troubleshooting Guide Common problems and what to do about them Symptom What to do See also Commands from the Emulation Check that you are using the correct firmware. Control Interface have no effect Commands from debugger have Use the Emulation Control Interface to try a few built-in page 269...
  • Page 269 Chapter 13: Troubleshooting the Emulation Module Emulation Module Status Lights Emulation Module Status Lights The emulation module uses status lights to communicate various modes and error conditions. The following table gives more information about the meaning of the power and target status lights. ❍...
  • Page 270 Chapter 13: Troubleshooting the Emulation Module Emulation Module Built-in Commands Emulation Module Built-in Commands The emulation module has some built-in commands (sometimes called the “terminal interface”) which you can use for troubleshooting. You can enter the built-in commands using: • A telnet (LAN) connection •...
  • Page 271 Chapter 13: Troubleshooting the Emulation Module Emulation Module Built-in Commands only one emulation module installed, the command might look like this: telnet test2 6472 4 If you do not see a prompt, press the key a few times. <Return> To exit from this telnet session, type at the prompt.
  • Page 272 Use the help command for more information on these and other commands. Note that some of commands listed in the help screens are generic commands for HP emulators and may not be available for your product. If you are writing your own debugger, contact HP for more information.
  • Page 273 Chapter 13: Troubleshooting the Emulation Module Problems with the BDM Connection Problems with the BDM Connection If a user interface behaves erratically ❏ Check the orientation of the cable connecting the target interface module to your target system. If the cable is offset or rotated, the emulator will try to interpret the “random”...
  • Page 274 Chapter 13: Troubleshooting the Emulation Module Problems with Configuration Problems with Configuration If you have problems displaying some registers ❏ If your user interface can read or write “generic” registers, but cannot access registers that are unique to your target microcontroller, check that the target microcontroller matches the processor type you have configured in the emulator.
  • Page 275 Chapter 13: Troubleshooting the Emulation Module Problems with the Target System Problems with the Target System If boot area accesses fail When you start a debugger interface or attempt to run from reset, the emulator makes four accesses to the target system boot area to find reset values for the SP and PC.
  • Page 276 Chapter 13: Troubleshooting the Emulation Module Problems with the LAN Interface Problems with the LAN Interface If LAN communication does not work If you cannot verify the connection, or if the commands are not accepted by the emulation module: ❏ Make sure that you wait for the power-on self test to complete before connecting.
  • Page 277 1 End any Emulation Control Interface or debugger sessions. 2 Disconnect the 50-pin cable from the emulation module, and plug the loopback test board (HP part number E3496-66502) into the emulation module. 3 In the system window, click the emulation module and select...
  • Page 278 1 Disconnect the 50-pin cable from the emulation module, and plug the loopback test board (HP part number E3496-66502) directly into the emulation module. Do not plug anything into the other end of the loopback test board.
  • Page 279 Chapter 13: Troubleshooting the Emulation Module Problems with the Emulation Module emulation module. Examples If you are using a UNIX system, to telnet to a logic analysis system named “mylogic”, enter: telnet mylogic 6472 Here are some examples of ways to use the pv command. To execute both tests one time: pv 1 To execute test 2 with maximum debug output repeatedly until a...
  • Page 280 ❏ Details of the failure can be obtained through using a -v option (“verbose” level) of 2 or more. ❏ Check that the loopback test board is connected. ❏ If the problem persists, contact HP for assistance. Solutions for CPU32...
  • Page 281 To do this, send your entire measurement system to the service center, including the logic analysis system, target interface module, and cables. In some parts of the world, on-site repair service is available. Ask an HP sales or service representative for details. Solutions for CPU32...
  • Page 282 Chapter 13: Troubleshooting the Emulation Module Returning Parts to Hewlett-Packard for Service To obtain replacement parts and cables The following table lists some parts that may be replaced if they are damaged or lost. Contact your nearest Hewlett-Packard Sales Office for further information.
  • Page 283 Chapter 13: Troubleshooting the Emulation Module Returning Parts to Hewlett-Packard for Service Solutions for CPU32...
  • Page 284 Glossary Analysis Probe A probing solution an emulation probe. connected to the target microcontroller. It provides an Extender A part whose only interface between the signals of the function is to provide connections target microcontroller and the inputs from one location to another. One or of the logic analyzer.
  • Page 285 Probe. board and the female pins of an analysis probe. Solution HP’s term for a set of tools for debugging your target system. A Preprocessor See Analysis Probe. solution includes probing, inverse assembly, the HPB4620B Source...
  • Page 286 Glossary mainframe logic analyzer in that it that obtains one-quarter of the does not offer card slots for signals from an elastomeric probe installation of additional capabilities, adapter (one side of a target and its specifications are not microcontroller) and makes them modified based upon selection from a available for probing.
  • Page 287 Solutions for CPU32...
  • Page 288 Index - (prefetched instruction) configuration checklist BDM port emulation module See debug port overview, 146 bits ADDR label, modifying using debugger, 149 labels addresses logic analyzers LSB and MSB mask configuration files STAT offset installing BKG light PC label loading branches, displaying reconstruction names of...
  • Page 289 HP 16600 installation setup configuration file names HP 16700A installation format menu loading files product numbers full solution output format target system design...
  • Page 290 HP 16550A connections offset, address record headers HP 16554/55/56 connections offset, trigger references HP 1660 series connections online configuration help registers HP 16600A and HP 16700A- operating characteristics initializing series analysis probe internal HP 16600A connections emulation module problems displaying...
  • Page 291 HP logic analyzers requirements for emulation SOURCE LINES in GPA format See Also under debugger names telnet wizard terminal interface specifications...
  • Page 292 1900 Garden of the Gods Road Colorado Springs, CO 80907 USA declares, that the product Product Name: Logic Analyzer Model Number(s): HP 16600A, HP 16601A, HP 16602A, HP 16603A Product Option(s): conforms to the following Product Specifications: Safety: IEC 1010-1:1990+A1 / EN 61010-1:1993 UL3111 CSA-C22.2 No.
  • Page 293 Product Regulations Safety IEC 1010-1:1990+A1 / EN 61010-1:1993 UL3111 CSA-C22.2 No. 1010.1:1993 This Product meets the requirement of the European Communities (EC) EMC Directive 89/336/EEC. Emissions EN55011/CISPR 11 (ISM, Group 1, Class A equipment), IEC 555-1 and IEC 555-2 Immunity EN50082-1 Code Notes...
  • Page 294 1900 Garden of the Gods Road Colorado Springs, CO 80907 USA declares, that the product Product Name: Logic Analyzer Mainframe Model Number(s): HP 16700A Product Option(s): conforms to the following Product Specifications: Safety: IEC 1010-1:1990+A1 / EN 61010-1:1993 UL3111 CSA-C22.2 No. 1010.1:1993...
  • Page 295 Product Regulations Safety IEC 1010-1:1990+A1 / EN 61010-1:1993 UL3111 CSA-C22.2 No. 1010.1:1993 This Product meets the requirement of the European Communities (EC) EMC Directive 89/336/EEC. Emissions EN55011/CISPR 11 (ISM, Group 1, Class A equipment), IEC 555-2 and IEC 555-3 Immunity EN50082-1 Code Notes...
  • Page 296 © Copyright Hewlett-Packard • Service instructions are for Safety Safety Symbols Company 1994-1998 trained service personnel. To This apparatus has been designed All Rights Reserved. avoid dangerous electric shock, and tested in accordance with do not perform any service unless IEC Publication 1010, Safety Reproduction, adaptation, or qualified to do so.
  • Page 297 Hewlett-Packard warrants that its suggestions regarding this manual Certification software and firmware designated by Hewlett-Packard for use with Hewlett-Packard Company documentation@col.hp.com an instrument will execute its certifies that this product met its programming instructions when published specifications at the properly installed on that time of shipment from the factory.

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