Mitsubishi Electric WS0-CPU0 Operating Manual page 146

Chapter 9
Figure 119:
Example for Fast shut off
with bypass with more than
one bypass conditions
143
Logic programming – Function blocks
 The Bypass input has an on-delay of 3 logic cycles to compensate delays due to
logic processing time and transmission time of the FLEXBUS+. The delay ensures
that the I/O module has received the bypass signal before it is used for the further
logic processing in the Fast shut off function block. As a result of the delay, the
Bypass input must be High 3 logic cycles in advance to successfully inhibit the fast
shut off. If this condition is fulfilled, then the Fast shut off output of the function block
and the physical output at the I/O module will both remain High.
 The Fast shut off directly switches off the connected output of the WS0-XTIO while
subsequent logic will be ignored. Therefore it is not possible to implement further
bypass conditions in the logic editor between the output of the Fast shut off function
block and the connected WS0-XTIO.
 Be aware that in the logic online monitor the value of the connected WS0-XTIO
output may differ from the effective value at the physical output of the WS0-XTIO.
For example the connected output can be Low as a result of the subsequent logic
while the output of the Fast shut off function block and the physical output of the
WS0-XTIO High because the Bypass input is High.
 If your application requires that the output of the WS0-XTIO module can be
switched off independently of an existing bypass condition (e.g. emergency stop),
then the underlying logic must be realised in a way that the respective shut-down
signal (e.g. emergency stop) switches off the bypass signal for the function block as
well, as shown in the following example: