Mitsubishi Electric WS0-CPU0 Operating Manual page 140

Chapter 9
ATTENTION
137
Logic programming – Function blocks
Inputs Up and Down
A rising edge (Low to High) at the Up input increases the value of the internal counter
by "1".
A rising edge (Low to High) at the Down input decreases the value of the internal
counter by "1".
If a rising edge (Low to High) occurs at the Up input as well as at the Down input
(applies only to the Up and down event counter function block), the value of the
internal counter remains unchanged.
Reset to zero
A valid pulse sequence with a Low-High-Low transition at the Reset to zero input sets
the internal counter to "0". This happens irrespective of whether the Overflow value
has been reached or not and also irrespective of whether Reset to zero after
overflow has been configured to Manual or Automatic.
The Min. restart pulse time defines the minimum required duration of the pulse at the
Reset to zero input. Valid values are 100 ms and 350 ms. If the pulse duration is
shorter than the configured minimum pulse time or longer than 30 s, the pulse is
ignored.
Reload
A valid pulse sequence with a Low-High-Low transition at the Reload input sets the
internal counter to the configured value of the Reload value parameter. This happens
irrespective of whether Counter reload has been configured to Manual or Automatic.
The Min. reload pulse time defines the minimum required duration of the pulse at the
Reload input. Valid values are 100 ms and 350 ms. If the pulse duration is shorter
than the configured minimum pulse time or longer than 30 s, the pulse is ignored.
Ensure that the transitions of the signals for resetting or reloading value fulfill
the requirements!
In case of a short-circuit to High (to 24 V DC) at a physical input, the evaluated signal
can have a pulse when the signal is reset due to the short-circuit detection. If such a
pulse can result in a dangerous state in the machine, the following points have to be
observed:
 Ensure protected cable laying for the signal line (due to cross-circuiting to other
signal lines).
 No short-circuit detection, i.e. do not reference to test outputs.
Overflow limit and Counter reset
The Counter reset parameter determines what happens when the counter value
reaches the Overflow limit. If this parameter is configured to Automatic, and the
internal counter equals the Overflow limit, the Overflow output becomes High for the
duration of the logic execution time. The value of the internal counter is subsequently
reset to zero.
If the Counter reset parameter is configured to Manual and the Overflow limit has
been reached, the Overflow output is set to High and remains High until the counter
value changes again, either by counting downward, by a valid Reset to zero pulse
sequence or by a valid pulse sequence at the Reload input, if the start value is smaller
than the overflow value. Until then, all further "Up" counting pulses are ignored.