Appendix-4 Memory Map - Fuji Electric micrex-sx SPH User Manual

Micrex-sx series pulse train positioning control combined module
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Appendix-4 Memory Map

1) Memory map of NP1F-MP1
Address No.
15
14
0
Bit data signal
+1
Bit data signal
+2
Current value read
+3
Current value read
+4
Current command value read
+5
Current command value read
+6
Current external pulse data read
+7
Current external pulse data read
+8
External pulse input counter
+9
Module detection time
+10
Bit command signal
+11
Bit command signal
+12
Set value area
+13
Set value area
The NP1F-MP1 I/O area occupies 14 words.
13
12
11
10
9
lower word
PC < = = MP1
upper word
PC < = = MP1
lower word
PC < = = MP1
upper word
PC < = = MP1
lower word
PC < = = MP1
upper word
PC < = = MP1
lower word
PC < = = MP1
upper word
PC < = = MP1
PC < = = MP1
PC < = = MP1
lower word
PC = = > MP1
upper word
PC = = > MP1
lower word
PC = = > MP1
upper word
PC = = > MP1
8
7
6
5
4
App.-10
3
2
1
0
Remarks
MP1
Read area
MP1
Write area
PC
PC

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