Figure 224. Lsb Justified 16-Bit Or 32-Bit Full-Accuracy With Cpol = 0; Figure 225. Lsb Justified 24-Bit Frame Length With Cpol = 0; Figure 226. Operations Required To Transmit 0X3478Ae - ST STM32F101xx Reference Manual

Serial peripheral interface (SPI)
LSB justified standard
This standard is similar to the MSB justified standard (no difference for the 16-bit and 32-bit
full-accuracy frame formats).

Figure 224. LSB justified 16-bit or 32-bit full-accuracy with CPOL = 0

CK
WS
SD

Figure 225. LSB Justified 24-bit frame length with CPOL = 0

CK
WS
SD
●
In transmission mode:
If data 0x3478AE have to be transmitted, two write operations to the SPI_DR register
are required from software or by DMA. The operations are shown below.

Figure 226. Operations required to transmit 0x3478AE

●
In reception mode:
If data 0x3478AE are received, two successive read operations from SPI_DR are
required on each RXNE event.
596/959
Transmission
May be 16-bit, 32-bit
MSB
Channel left
8-bit data
0 forced
Channel left 32-bit
First write to Data register
conditioned by TXE = '1'
0xXX34
Only the 8 LSB bits of the half-word
are significant. Whatever the 8 MSBs
a field of 0x00 is forced instead
Reception
LSB MSB
Transmission
24-bit remaining
MSB
Second write to Data register
conditioned by TXE = '1'
0x78AE
RM0034
Channel right
Reception
LSB
Channel right