Table 51. External Trigger For Regular Channels For Adc1 And Adc2; Table 52. External Trigger For Injected Channels For Adc1 And Adc2 - ST STM32F101xx Reference Manual

RM0034
Table 51.
TIM1_CC1 event
TIM1_CC2 event
TIM1_CC3 event
TIM2_CC2 event
TIM3_TRGO event
TIM4_CC4 event
EXTI line11/TIM8_TRGO
(1)(2)
event
SWSTART
1. The TIM8_TRGO event exists only in High-density devices.
2. The selection of the external trigger EXTI line11 or TIM8_TRGO event for regular channels is done through
configuration bits ADC1_ETRGREG_REMAP and ADC2_ETRGREG_REMAP for ADC1 and ADC2,
respectively.
Table 52.
TIM1_TRGO event
TIM1_CC4 event
TIM2_TRGO event
TIM2_CC1 event
TIM3_CC4 event
TIM4_TRGO event
EXTI line15/TIM8_CC4
(1)(2)
event
JSWSTART
1. The TIM8_CC4 event exists only in High-density devices.
2. The selection of the external trigger EXTI line15 or TIM8_CC4 event for injected channels is done through
configuration bits ADC1_ETRGINJ_REMAP and ADC2_ETRGINJ_REMAP for ADC1 and ADC2,
respectively.
External trigger for regular channels for ADC1 and ADC2
Source
Internal signal from on-chip
timers
External pin/Internal signal from
on-chip timers
Software control bit
External trigger for injected channels for ADC1 and ADC2
Source
Internal signal from on-chip
timers
External pin/Internal signal from
on-chip timers
Software control bit
Analog-to-digital converter (ADC)
Type
Connection type
EXTSEL[2:0]
000
001
010
011
100
101
110
111
JEXTSEL[2:0]
000
001
010
011
100
101
110
111
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