Chapter 3
Serial Peripheral Interface (SPI)
The CoreModule 430 provides an SPI header for programming the SPI Flash virtual floppy drive.
Table 3-13
describes the pin signals of the SPI header, which provides a single-row of 6 pins with 0.079"
(2mm) pitch.
Table 3-13. SPI Interface Pin/Signal Descriptions (J19)
Pin #
Signal
1
EXT_CS*
2
EXT_CLK
3
EXT_DO
4
EXT_DI
5
V.3.3
6
GND
Note: The shaded table cells denote power or ground. The * symbol indicates the signal is Active Low.
Low Pin Count Interface (LPC)
The LPC interface provides expansion for custom LPC devices.
Table 3-14
describes the pin signals of the LPC interface, which uses a 10-pin header with 2 rows, odd/even
sequence (1, 2), and 0.079" (2mm) pitch.
Table 3-14. LPC Interface Pin/Signal Descriptions (J20)
Pin #
Signal
1
AD0
2
SERIRQ
3
AD1
4
DRQ
5
AD2
6
FRAME
7
AD3
8
CLK_PCI
9
V.3.3
10
GND
Note: The shaded table cells denotes power or ground.
Miscellaneous
Real Time Clock (RTC)
The CoreModule 430 contains a Real Time (time of day) Clock (RTC), which can be backed up with an
external cell battery. The CoreModule 430 will function without a battery in those environments which
prohibit batteries. The CoreModule 430 will also continue to operate after the battery life has been
exceeded. Under these conditions all setup information is restored from the on-board Flash memory during
POST along with the default date and time information.
NOTE
Some operating systems require a valid default date and time to function.
28
Description
SPI Chip Select
SPI Clock
SPI Data Out
SPI Data In
+3.3 Volts Power
Ground
Description
Command, Address, and Data 0
Serial Interrupt Request
Command, Address, and Data 1
DMA Request
Command, Address, and Data 2
Frame Signals - indicate start of new cycle or termination of broken cycle
Command, Address, and Data 3
PCI Clock
+3.3 Volts Power
Ground
Reference Manual
Hardware
CoreModule 430
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