Functional Overview; Arm ® -Cortex ® -M0 Core; Memories; Boot Modes - STMicroelectronics STM32F038C6 Manual

STM32F038x6
3

Functional overview

Figure 1
®
3.1 ARM
The ARM
systems. It has been developed to provide a low-cost platform that meets the needs of MCU
implementation, with a reduced pin count and low-power consumption, while delivering
outstanding computational performance and an advanced system response to interrupts.
The ARM
performance expected from an ARM core, with memory sizes usually associated with 8- and
16-bit devices.
The STM32F038x6 devices embed ARM core and are compatible with all ARM tools and
software.
3.2

Memories

The device has the following features:
•
4 Kbytes of embedded SRAM accessed (read/write) at CPU clock speed with 0 wait
states and featuring embedded parity checking with exception generation for fail-critical
applications.
•
The non-volatile memory is divided into two arrays:
–
–
The option bytes are used to write-protect the memory (with 4 KB granularity) and/or
readout-protect the whole memory with the following options:
–
–
–
3.3

Boot modes

At startup, the boot pin and boot selector option bit are used to select one of the three boot
options:
•
Boot from User Flash memory
•
Boot from System Memory
•
Boot from embedded SRAM
The boot loader is located in System Memory. It is used to reprogram the Flash memory by
using USART on pins PA14/PA15 or PA9/PA10.
shows the general block diagram of the STM32F038x6 devices.
®
-Cortex -M0 core
® ®
Cortex -M0 is a generation of ARM 32-bit RISC processors for embedded
® ®
Cortex -M0 processors feature exceptional code-efficiency, delivering the high
32 Kbytes of embedded Flash memory for programs and data
Option bytes
Level 0: no readout protection
Level 1: memory readout protection, the Flash memory cannot be read from or
written to if either debug features are connected or boot in RAM is selected
Level 2: chip readout protection, debug features (Cortex
boot in RAM selection disabled
DocID026079 Rev 3
Functional overview
® -M0 serial wire) and
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