Functional Overview; Arm ® -Cortex ® -M0 Core With Embedded Flash And Sram; Memories; Boot Modes - STMicroelectronics STM32F031F4 Manual

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Functional overview

3 Functional overview
®
3.1 ARM
The ARM
systems. It has been developed to provide a low-cost platform that meets the needs of MCU
implementation, with a reduced pin count and low-power consumption, while delivering
outstanding computational performance and an advanced system response to interrupts.
The ARM
delivering the high-performance expected from an ARM core in the memory size usually
associated with 8- and 16-bit devices.
The STM32F0xx family has an embedded ARM core and is therefore compatible with all
ARM tools and software.
Figure 1
3.2

Memories

The device has the following features:

4 Kbytes of embedded SRAM accessed (read/write) at CPU clock speed with 0 wait
states and featuring embedded parity checking with exception generation for fail-critical
applications.

The non-volatile memory is divided into two arrays:
–
–
The option bytes are used to write-protect the memory (with 4 KB granularity) and/or
readout-protect the whole memory with the following options:
–
–
–
3.3

Boot modes

At startup, the boot pin and boot selector option bit are used to select one of the three boot
options:

Boot from User Flash

Boot from System Memory

Boot from embedded SRAM
The boot loader is located in System Memory. It is used to reprogram the Flash memory by
using USART on pins PA14/PA15 or PA9/PA10.
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®
-Cortex -M0 core with embedded Flash and SRAM
® ®
Cortex -M0 processor is the latest generation of ARM processors for embedded
® ®
Cortex -M0 32-bit RISC processor features exceptional code-efficiency,
shows the general block diagram of the device family.
16 to 32 Kbytes of embedded Flash memory for programs and data
Option bytes
Level 0: no readout protection
Level 1: memory readout protection, the Flash memory cannot be read from or
written to if either debug features are connected or boot in RAM is selected
Level 2: chip readout protection, debug features (Cortex
boot in RAM selection disabled
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