Electrical characteristics
Symbol
Parameter
Weak pull-up
R
equivalent resistor
PU
(3)
Weak pull-down
R
equivalent
PD
(3)
resistor
C
I/O pin capacitance
IO
1. Data based on design simulation only. Not tested in production.
2. The leakage could be higher than the maximum value, if negative current is injected on adjacent pins. Refer to
I/O current injection
susceptibility.
3. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This
PMOS/NMOS contribution to the series resistance is minimal (~10% order).
All I/Os are CMOS- and TTL-compliant (no software configuration required). Their
characteristics cover more than the strict CMOS-technology or TTL parameters. The
coverage of these requirements is shown in
5 V tolerant I/Os. The following curves are design simulation results, not tested in
production.
64/102
Table 44. I/O static characteristics (continued)
Conditions
V
V
=
IN
SS
V
V
=
IN
DDIOx
-
DocID026079 Rev 3
Min
Typ
25
40
25
40
-
5
Figure 19
for standard I/Os, and in
STM32F038x6
Max
Unit
55
kΩ
55
kΩ
-
pF
Table 43:
Figure 20
for
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