Event Register - Anritsu MT9083 Series Operation Manual

2.6.3 Event Register

Standard Event Status Register
The meaning of each bit of the standard event status register is listed in
the table below.
Table 2.6.3-1 Meaning of Standard Event Status Register
Bit
7 Power-on
Becomes 1 at power-on and 0 each time 1 is read.
6 User Request
Not used; always 0
5 Command Error
Becomes 1 when received undefined program message,
message that cannot executed according to syntax, or
message with spelling error
4 Execution Error
Becomes 1 when received program message that cannot
be executed because parameter specification is out of
range.
3 Device Dependent Error
Becomes 1 at errors other than command, execution
and query errors.
2 Query Error
Becomes 1 when no data to read in output queue or
output queue data fails for some reason.
1 Request Control
Not used; always 0
0 Operation Complete
Indicates whether or not device completely ended
operations in event table. This command responds only
to the *OPC command.
Bit 7 to bit 1 of the standard event register can be read by the *ESR?
command. The standard event register returns to 0 when read.
The standard event register enable register can be set and read using the
*ESE and *ESE? commands. To output standard event register data, set
the bit corresponding to the enable register to 1.
Bit 0 can be read using the *OPC common command.
The standard event register can be set to 0 using the *CLS command.
2.6 Checking Instrument Status
Explanation
2
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