638 Chapter 17 Hardware procedures
Figure 252
D-sub pinout for J3 and J4 BITS cables for DS1 or E1 balanced
pin numbers
5
4
9
8
241-1501-240 5.2S2
3
2
1
7
6
Ground
BITSRXN (or BITSRX ring)
BITSRXP (or BITSRX tip)
To site's
clock
distribution
panel
PPT 2819 010 AD