Video Capture Fifo Configurations; Bt.656 Video Capture Fifo Configuration - Texas Instruments TMS320DM648 User Manual

Video Port FIFO

1.2.2 Video Capture FIFO Configurations

During video capture operation, the video port FIFO has one of four configurations depending on the
capture mode. For BT.656 operation, the FIFO is split into channel A and B, as shown in
FIFO is clocked independently with the channel A FIFO receiving data from the VDIN[9-2] half of the bus
and the channel B FIFO receiving data from the VDIN[19-12] half of the bus. Each channel's FIFO is
further split into Y, Cb, and Cr buffers with separate write pointers and read registers (YSRCx, CBSRCx,
and CRSRCx).
VDIN[9−2]
VDIN[19−12]
20 Overview
Figure 1-2. BT.656 Video Capture FIFO Configuration
8
Y Buffer A (1280 bytes)
Cb Buffer A (640 bytes)
8
Cr Buffer A (640 bytes)
8
8
Y Buffer B (1280 bytes)
Cb Buffer B (640 bytes)
8
Cr Buffer B (640 bytes)
8
Capture FIFO A
64
64
64
Capture FIFO B
64
64
64
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Figure 1-2. Each
YSRCA
CBSRCA
CRSRCA
YSRCB
CBSRCB
CRSRCB
SPRUEM1 – May 2007
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