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TMS320C6713 Digital Signal Processor Optimized for High
Roshan Gummattira, Philip Baltz,
Nat Seshan
The TMS320C6713's high performance CPU and rich peripheral set are tailored for
multichannel audio applications such as broadcast and recording mixing, home and large
venue audio decoders, and multi-zone audio distribution. The TMS320C6713 device is
based on the high-performance advanced VelociTI
architecture developed by Texas Instruments (TI). The VelociTI architecture provides ample
performance to decode a variety of existing digital audio formats and the flexibility to add
future formats.
This paper will describe the following parts of the TMS32C6713 processor and their impact
on high performance multichannel audio systems:
The external peripheral architecture
The C67x CPU architectural features and performance
The real-time two-level cache architecture
The multichannel audio serial ports (McASPs)
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Trademarks are the property of their respective owners.
Performance Multichannel Audio Systems
ABSTRACT
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Application Report
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DSP Applications
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Table of Contents
Related Manuals for Texas Instruments TMS320C6713
Summary of Contents for Texas Instruments TMS320C6713
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Page 1: Table Of Contents
DSP Applications Nat Seshan ABSTRACT The TMS320C6713’s high performance CPU and rich peripheral set are tailored for multichannel audio applications such as broadcast and recording mixing, home and large venue audio decoders, and multi-zone audio distribution. The TMS320C6713 device is... -
Page 2: Introduction
Two Inter-IC (I2C) buses for connection to serial ROMs or to control other system interface devices like user I/O A dedicated general-purpose input/output (GPIO) module to provide direct control lines to system components, eliminating much of the glue logic in many designs TMS320C6713 Digital Signal Processor Optimized for High Performance Multichannel Audio Systems... -
Page 3: Figure 1 Digital Surround Receiver Block Diagram
Multichannel conversion analog Multichannel A to D conversion Speaker level Stereo analog Subwoofer Tuner System controller User displays IR receiver and controls Figure 1. Digital Surround Receiver Block Diagram TMS320C6713 Digital Signal Processor Optimized for High Performance Multichannel Audio Systems... -
Page 4: Figure 2 Generalized High Performance Multichannel Audio System
Timer 1 bytes 4K bytes Timer 0 Clock generator oscillator and PLL Power– x4 through x25 down multiplier logic /1 through /32 dividers Figure 3. TMS3206713 CPU and Peripheral Connectivity. TMS320C6713 Digital Signal Processor Optimized for High Performance Multichannel Audio Systems... -
Page 5: C67X Cpu And Instruction Set
C67x CPU from other VLIW architectures. Operating at 225 MHz, the TMS320C6713 delivers up to 1350 million floating-point operations per second (MFLOPS), 1800 million instructions per second (MIPS), and with dual fixed-floating-point multipliers up to 450 million multiply-accumulate operations per second (MMACS). -
Page 6: Two-Level Cache
L1. Cache Hides Off-Chip Latency The external memories that interface to the TMS320C6713 may operate at a maximum of 100 MHz, while the device operates at a 225 MHz maximum frequency. All external memory devices have significant start-up latencies associated with them. -
Page 7: Unified L2 For Program And Data
L2 RAM. Typical processors require that peripheral data first be placed in external memory before it can be accessed by the CPU. The TMS320C6713 can maintain data buffers in on-chip memory, rather than in off-chip memory, providing a higher data throughput to peripherals. This increases performance when using on-chip McASPs, the HPI, or external peripherals. -
Page 8: Cache Summary
McASP Overview The McASP is a serial port optimized for the needs of multichannel audio applications. With two McASP peripherals, the TMS320C6713 device is capable of supporting two completely independent audio zones simultaneously. Each McASP consists of a transmit and receive section. These sections can operate completely independently with different data formats, separate master clocks, bit clocks, and frame syncs or alternatively, the transmit and receive sections may be synchronized. -
Page 9: Dit Transfer Mode
(programmable factor /1, /2, /3, ... /4096). The polarity of each bit clock is individually programmable. TMS320C6713 Digital Signal Processor Optimized for High Performance Multichannel Audio Systems... -
Page 10: Mcasp Error Handling And Management
Conclusion The TMS320C6713 peripheral set enables the device to directly interface to a variety of components in these systems. The McASPs provide highly-flexible direct interconnect to the digital audio streams as well as high performance audio data converters. The two-level cache enables efficient data management and real time I/O while hiding performance issues associated with low cost external SDRAM. -
Page 11: References
5. TMS320C6000 CPU and Instruction Set Reference Guide (SPRU189) 6. TMS320C6000 Peripherals Reference Guide (SPRU190) 7. Payan, Reimi, DSP software and hardware trade-offs in Professional Audio Applications, Audio Engineering Society, 112th Convention. 2002 May 10–13 Munich, Germany TMS320C6713 Digital Signal Processor Optimized for High Performance Multichannel Audio Systems... - Page 12 TI product or service and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements. Following are URLs where you can obtain information on other Texas Instruments products and application solutions:...