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1.2
Video Port FIFO
The video port includes a FIFO to store data coming into or out from the video port. The video port
operates in conjunction with EDMA transfers to move data between the video port FIFO and external or
on-chip memory. You can program threshold settings so that EDMA events generate when the video port
FIFO reaches a certain fullness (for capture) or goes below a certain fullness (for display). You set up
EDMA Channels that are required to service the FIFO independently and are key to correct operation of
the video port. The FIFO size is relatively large to allow time for EDMA Channels to service the transfer
requests, since the device typically has many peripheral interfaces, including five video ports.
The following sections briefly describe the interaction with the EDMA and different FIFO configurations
that are used to support the various modes of the video port.
1.2.1 EDMA Interface
Video port data transfers take place using EDMA Channels. EDMA requests are based on buffer
thresholds. Since the video port does not directly source the transfer, it can not adjust the transfer size
based on buffer empty/full status. This means the EDMA transfer size is essentially fixed in the
user-programmed EDMA parameter table. The preferred transfer size is often one entire line of data
because this allows the most flexibility in terms of frame buffer line pitch (in RAM). Some modes of
operation for the highest display rates may require more frequent EDMA requests, such as on a half or
quarter line basis.
All requests are based on buffer thresholds. EDMA requests are made whenever the number of samples
in the buffer reaches the threshold value in video capture mode. In order to ensure that all data from a
capture field/frame gets emptied from the buffer, the transfer size must be equal to the threshold and the
total amount of field/frame data must be a multiple of the transfer size.
For video display operation, EDMA requests are made whenever there is at least the threshold number of
double words free in the FIFO. This means that the transfer size must be equal or smaller than the
threshold so that it fits into the available space. The field/frame size must still be a multiple of the transfer
size or there are pixels left in the buffer at the end of the field (which appear at the start of the next field).
SPRUEM1 – May 2007
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Video Port FIFO
Overview
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