Page 1 TMS320C54x Assembly Language Tools User’s Guide Literature Number: SPRU102C October1998 Printed on Recycled Paper...
Page 2 IMPORTANT NOTICE Texas Instruments (TI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to obtain the latest version of relevant information to verify, before placing orders, that the information being relied on is current.
Page 3 Hex conversion utility How to Use This Manual The goal of this book is to help you learn how to use the Texas Instruments assembly language tools specifically designed for the TMS320C54x DSPs. This book is divided into four parts:...
Page 4 Notational Conventions How to Use This Manual / Notational Conventions Reference material provides supplementary information. This section contains technical data about the internal format and structure of COFF object files. It discusses symbolic debugging directives that the C compiler uses. Finally, it includes hex conversion utility examples, assembler and linker error messages, and a glossary.
Page 5 Notational Conventions In assembler syntax statements, column 1 is reserved for the first character of a label or symbol. If the label or symbol is optional, it is usually not shown. If it is a required parameter, then it will be shown starting against the left margin of the shaded box, as in the example below.
Page 6 Instruments Literature Response Center at (800) 477–8924. When ordering, please identify the book by its title and literature number. TMS320C54x DSP Reference Set is composed of four volumes that can be ordered as a set with literature number SPRU210. To order an individual...
Page 7 Related Documentation From Texas Instruments / Trademarks TMS320C54x C Source Debugger User’s Guide (literature number SPRU099) tells you how to invoke the ’C54x emulator, evaluation module, and simulator versions of the C source debugger interface. This book discusses various aspects of the debugger interface, including window management, command entry, code execution, data management, and breakpoints.
Page 8 When making suggestions or reporting errors in documentation, please include the following information that is on the title page: the full title of the book, the publication date, and the literature number. Mail: Texas Instruments Incorporated Email: dsph@ti.com Technical Documentation Services, MS 702 P.O.
Page 9: Table Of Contents
Contents Contents Introduction ..............Provides an overview of the software development tools.
Page 10 Contents Naming Alternate Files and Directories for Assembler Input ..... . 3.4.1 Using the – i Assembler Option ........3.4.2 Using the A_DIR Environment Variable .
Page 11 Contents Directives That Format the Output Listing ........4-17 Directives That Reference Other Files .
Page 12 Contents Linker Options ............. 7.4.1 Relocation Capabilities (–...
Page 13 Contents 7.12 Default Allocation Algorithm ..........7-53 7.12.1 Allocation Algorithm .
Page 14 10.11.3 Motorola Exorciser Object Format (–m1, –m2, –m3 Options) ... . 10-41 10.11.4 Texas Instruments SDSMAC Object Format (–t Option) ....10-42 10.11.5 Extended Tektronix Object Format (–x Option)
Page 15 Contents 11 Mnemonic-to-Algebraic Translator Description ........11-1 Explains how to invoke the mnemonic-to-algebraic translator utility to convert a source file containing mnemonic instructions to a source file containing algebraic instructions.
Page 16 Contents Hex Conversion Utility Examples ..........Illustrates command file development for a variety of memory systems and situations.
Page 17 1–1 TMS320C54x Software Development Flow ........
Page 18 Figures 10–12 Motorola-S Format ............10-41 10–13 TI-Tagged Object Format .
Page 19 Tables Tables 3–1 Operators Used in Expressions (Precedence) ........3-25 3–2 Expressions With Absolute and Relocatable Symbols...
Page 20 Tables A–20 Section Format for Auxiliary Table Entries ........A-24 A–21 Tag Name Format for Auxiliary Table Entries...
Page 21 Examples Examples 2–1 Using Sections Directives ........... . . 2-10 2–2 Code That Generates Relocation Entries...
Page 22 7–12 Default Allocation for TMS320C54x Devices ........
Page 23: Introduction
Chapter 1 Introduction The TMS320C54x DSPs are supported by the following assembly language tools: Assembler Archiver Linker Absolute lister Cross-reference utility Hex conversion utility Mnemonic-to-algebraic translator utility This chapter shows how these tools fit into the general software tools develop- ment flow and gives a brief description of each tool.
Page 24: Software Development Tools Overview
1.1 Software Development Tools Overview Figure 1–1 illustrates the ’C54x software development flow. The shaded portion of the figure highlights the most common path of software develop- ment; the other portions are optional. Figure 1–1. TMS320C54x Software Development Flow source files Macro...
Page 25: Tools Descriptions
Standard runtime-support library functions are provided as source code in rts.src and as object code in rts.lib. The TMS320C54x DSP accepts COFF files as input, but most EPROM programmers do not. The hex conversion utility converts a COFF object file into TI-tagged, Intel, Motorola, or Tektronix object format.
Page 26 ’C54x target system. You can use one of several debugging tools to refine and correct your code. Available products include: An instruction-accurate software simulator An extended development system (XDS510 ) emulator An evaluation module (EVM) For information about these debugging tools, see the TMS320C54x C Source Debugger User’s Guide .
Page 27: Introduction To Common Object File Format
Introduction to Common Object File Format The assembler and linker create object files that can be executed by a TMS320C54x device. The format for these object files is called common object file format (COFF). COFF makes modular programming easier, because it encourages you to think in terms of blocks of code and data when you write an assembly language program.
Page 28: Coff File Types
COFF files are identical. For details about the COFF file structure, see Appendix A, Common Object File Format . The TMS320C54x assembler and C compiler create COFF2 files. The linker can read and write all types of COFF files. By default, the linker creates COFF2 files.
Page 29: Partitioning Memory Into Logical Blocks
Sections Several assembler directives allow you to associate various portions of code and data with the appropriate sections. The assembler builds these sections during the assembly process, creating an object file organized as shown in Figure 2–1. One of the linker’s functions is to relocate sections into the target memory map; this function is called allocation .
Page 30 How the Assembler Handles Sections How the Assembler Handles Sections The assembler identifies the portions of an assembly language program that belong in a section. The assembler has five directives that support this function: .bss .usect .text .data .sect The .bss and .usect directives create uninitialized sections ; the .text, .data, and .sect directives create initialized sections .
Page 31 How the Assembler Handles Sections The syntax for these directives is: .bss symbol, size in words [, [ blocking flag ] [, alignment flag ]] symbol .usect ” section name ” , size in words [, [ blocking flag ] [, alignment flag ]] symbol points to the first word reserved by this invocation of the .bss or .usect directive.
Page 32 How the Assembler Handles Sections 2.3.2 Initialized Sections Initialized sections contain executable code or initialized data. The contents of these sections are stored in the object file and placed in processor memory when the program is loaded. Each initialized section is independently relocat- able and may reference symbols that are defined in other sections.
Page 33: Named Sections
How the Assembler Handles Sections 2.3.3 Named Sections Named sections are sections that you create. You can use them like the default .text, .data, and .bss sections, but they are assembled separately. For example, repeated use of the .text directive builds up a single .text section in the object file.
Page 34: Subsections
How the Assembler Handles Sections 2.3.4 Subsections Subsections are smaller sections within larger sections. Like sections, subsections can be manipulated by the linker. Subsections give you tighter control of the memory map. You can create subsections by using the .sect or .usect directive.
Page 35: An Example That Uses Sections Directives
How the Assembler Handles Sections 2.3.6 An Example That Uses Sections Directives Example 2–1 shows how you can build COFF sections incrementally, using the sections directives to swap back and forth between the different sections. You can use sections directives to begin assembling into a section for the first time, or to continue assembling into a section that already contains code.
Page 36: Using Sections Directives
How the Assembler Handles Sections Example 2–1. Using Sections Directives ************************************************ Assemble an initialized table into .data. ** ************************************************ 000000 .data 000000 0011 coeff .word 011h,022h,033h 000001 0022 000002 0033 ************************************************ Reserve space in .bss for a variable. ************************************************ 10 000000 .bss buffer,10 ************************************************...
Page 37: Object Code Generated By The File In Example
How the Assembler Handles Sections As Figure 2–2 shows, the file in Example 2–1 creates five sections: .text contains ten 16-bit words of object code. .data contains seven words of object code. vectors is a named section created with the .sect directive; it contains two words of initialized data.
Page 63: Character Strings
Character Strings Character Strings 3.7 Character Strings A character string is a string of characters enclosed in double quotes. Double quotes that are part of character strings are represented by two consecutive double quotes. The maximum length of a string varies and is defined for each directive that requires a character string.
Page 64: Symbols
Symbols 3.8 Symbols Symbols are used as labels, constants, and substitution symbols. A symbol name is a string of up to 200 alphanumeric characters (A – Z, a – z, 0 – 9, $, and _ ). The first character in a symbol cannot be a number, and symbols can- not contain embedded blanks.
Page 65: Defining Symbolic Constants (–D Option)
Symbols 3.8.3 Defining Symbolic Constants (–d Option) The –d option equates a constant value with a symbol. The symbol can then be used in place of a value in assembly source. The format of the –d option is as follows: asm500 –d name =[ value ] The name is the name of the symbol you want to define.
Page 66: Substitution Symbols
Symbols 3.8.5 Substitution Symbols Symbols can be assigned a string value (variable). This enables you to alias character strings by equating them to symbolic names. Symbols that represent character strings are called substitution symbols. When the assembler encounters a substitution symbol, its string value is substituted for the symbol name.
Page 67: Local Labels
Symbols 3.8.6 Local Labels Local labels are special labels whose scope and effect are temporary. A local label can be defined in two ways: $n, where n is a decimal digit in the range of 0–9. For example, $4 and $1 are valid local labels.
Page 68 Symbols (b) Code that uses a local label illegally Label1: LD ADDRA, A ; Load Address A to Accumulator A. SUB ADDRB, A ; Subtract Address B. BC $1, ALT ; If less than zero, branch to $1; LD ADDRB, A ;...
Page 69: Name? Local Labels
Symbols Example 3–2. name? Local Labels ;********************************************************* First definition of local label ’mylab’ ;********************************************************* mylab? b mylab? ;********************************************************* Include file has second definition of ’mylab’ ;********************************************************* .copy ”a.inc” ;********************************************************* ;Third definition of ’mylab’, reset upon exit from include ;********************************************************* mylab? b mylab? ;********************************************************* Fourth definition of ’mylab’...
Page 70: Expressions
Expressions 3.9 Expressions An expression is a constant, a symbol, or a series of constants and symbols separated by arithmetic operators. The range of valid expression values is –32 768 to 32 767. Three main factors influence the order of expression evalu- ation: Parentheses Expressions that are enclosed in parentheses are...
Page 71: Operators Used In Expressions (Precedence)
Note: Differences in Precedence From Other TMS320 Assemblers Some other TMS320 processors use a different order of precedence than the TMS320C54x, and occasionally different results may be produced from the same source code for this reason. The ’C54x uses the same order of pre- cedence as the C language.
Page 72: Well-Defined Expressions
Expressions 3.9.3 Well-Defined Expressions Some assembler directives require well-defined expressions as operands. Well-defined expressions contain only symbols or assembly-time constants that are defined before they are encountered in the expression. The evaluation of a well-defined expression must be absolute. Example 3–3. Well-Defined Expressions (a) Valid well-defined expressions .data label1...
Page 73: Expressions With Absolute And Relocatable Symbols
Expressions 3.9.4 Conditional Expressions The assembler supports relational operators that can be used in any expression; they are especially useful for conditional assembly. Relational operators include the following: Equal to Equal to Not equal to < Less than <= Less than or equal to >...
Page 74 Expressions Following are examples of expressions that use relocatable and absolute sym- bols. These examples use four symbols that are defined in the same section: .global extern_1 ; Defined in an external module intern_1: .word ’”D’ ; Relocatable, defined in current module LAB1: .set 2 ;...
Page 75: Assembler Built-In Math Functions
Built-in Functions 3.10 Built-in Functions The assembler supports built-in functions for conversions and transcendental math computations. Table 3–3 describes the built-in functions. Note that expr must be a constant value. See Table 5–1 for a description of the assembler’s non-mathematical built-in functions. Table 3–3.
Page 76: Extended Addressing Support
Extended Addressing Support Built-in Functions / Extended Addressing Support Table 3–3. Assembler Built-In Math Functions (Continued) Function Description $pow( expr1, expr2 ) raises expr1 to the power expr 2 $round( expr ) returns the result of expr rounded to the nearest integer $sgn( expr ) returns the sign of expr $sin( expr )
Page 77: Source Listings
Source Listings 3.12 Source Listings A source listing shows source statements and the object code they produce. To obtain a listing file, invoke the assembler with the –l (lowercase L) option. Two banner lines, a blank line, and a title line are at the top of each source list- ing page.
Page 78 Source Listings Field 3: Object Code This field contains the hexadecimal representation of the object code. All machine instructions and directives use this field to list object code. This field also indicates the relocation type by append- ing one of the following characters to the end of the field: undefined external reference ’...
Page 79: Assembler Listing
Source Listings Example 3–4. Assembler Listing (a) Mnemonic example .global RESET, INT0, INT1, INT2 .global TINT, RINT, XINT, USER .global ISR0, ISR1, ISR2 .global time, rcv, xmt, proc initmac .macro * initialize macro SSBX OVM ; disable oflow LD #0, DP ;...
Page 80 Source Listings Example 3–4.Assembler Listing (Continued) (b) Algebraic example .global RESET, INT0, INT1, INT2 .global TINT, RINT, XINT, USER .global ISR0, ISR1, ISR2 .global time, rcv, xmt, proc initmac .macro * initialize macro OVM = 1 ; disable oflow DP = #0 ;...
Page 81: Cross-Reference Listings
Cross-Reference Listings 3.13 Cross-Reference Listings A cross-reference listing shows symbols and their definitions. To obtain a cross-reference listing, invoke the assembler with the –x option or use the .option directive. The assembler will append the cross-reference to the end of the source listing.
Page 82 Cross-Reference Listings Note that when the assembler generates a cross–reference listing for an assembly file that contains .include directives, it keeps a record of the include file and line number in which a symbol is defined/referenced. It does this by assigning a letter reference (A, B, C, etc.) for each include file.
Page 83 Cross-Reference Listings produce the following cross–reference listing: xref.asm PAGE 1 000000 start: .include ”incl0.asm” .include ”incl1.asm” 4 000003 F000 add #10,A 000004 000A .include ”incl2.asm” 7 000006 F495 8 000007 F495 9 000008 F073 b start 000009 0000! .global start 13 000000 .bss ABC,2 xref.asm...
Page 84 Chapter 4 Assembler Directives Assembler directives supply data to the program and control the assembly process. Assembler directives enable you to do the following: Assemble code and data into specified sections Reserve space in memory for uninitialized variables Control the appearance of listings Initialize memory Assemble conditional blocks Define global variables...
Page 85: Assembler Directives Summary
Directives Summary 4.1 Directives Summary This section summarizes the assembler directives. Besides the assembler directives documented here, the TMS320C54x software tools support the following directives: The assembler uses several directives for macros. The macro directives are listed in this chapter, but they are described in detail in Chapter 5, Macro Language .
Page 86 Directives Summary Table 4–1. Assembler Directives Summary (Continued) (b) Directives that initialize constants (data and memory) Mnemonic and Syntax Description Page .bes size in bits Reserve size bits in the current section; note that a 4-80 label points to the last addressable word in the reserved space .byte value [, ...
Page 87 Directives Summary Table 4–1. Assembler Directives Summary (Continued) (c) Directives that align the section program counter (SPC) Mnemonic and Syntax Description Page .align [ size in words ] Align the SPC on a word boundary specified by the 4-27 parameter; the parameter must be a power of 2, or default to page boundary.
Page 88 Directives Summary Table 4–1. Assembler Directives Summary (Continued) (e) Directives that reference other files Mnemonic and Syntax Description Page .copy [”] filename [”] Include source statements from another file 4-36 .def symbol [, ... , symbol Identify one or more symbols that are defined in the 4-51 current module and may be used in other modules .global symbol...
Page 89 Directives Summary Table 4–1. Assembler Directives Summary (Continued) (h) Directives that define symbols at assembly time Mnemonic and Syntax Description Page .asg [”] character string [”], Assign a character string to a substitution symbol 4-28 substitution symbol .endstruct End structure definition 4-84 .endunion End union definition...
Page 90: Compatibility With The Tms320C1X/C2X/C2Xx/C5X Assembler Directives
Compatibility With the TMS320C1x/C2x/C2xx/C5x Assembler Directives 4.2 Compatibility With the TMS320C1x/C2x/C2xx/C5x Assembler Directives This section explains how the TMS320C54x assembler directives differ from the TMS320C1x/C2x/C2xx/C5x assembler directives. The ’C54x .long and .float directives place the most significant word of the value at the lower address, while the ’C1x/C2x/C2xx/C5x assembler direc-...
Page 91: Directives That Define Sections
Directives That Define Sections 4.3 Directives That Define Sections These directives associate portions of an assembly language program with the appropriate sections: .bss reserves space in the .bss section for uninitialized variables. .clink sets the STYP_CLINK flag in the type field for the named section. The .clink directive can be applied to initialized or uninitialized sections.
Page 92 Directives That Define Sections Example 4–1 shows how you can use sections directives to associate code and data with the proper sections. This is an output listing; column 1 shows line numbers, and column 2 shows the SPC values. (Each section has its own pro- gram counter, or SPC.) When code is first placed in a section, its SPC equals 0.
Page 93 Directives That Define Sections Example 4–1. Sections Directives ************************************************** Start assembling into the .text section ************************************************** 000000 .text 000000 0001 .word 1,2 000001 0002 000002 0003 .word 3,4 000003 0004 ************************************************** Start assembling into the .data section ************************************************** 000000 .data 000000 0009 .word 9, 10 000001 000A...
Page 94: The .Space And .Bes Directives
Directives That Initialize Constants 4.4 Directives That Initialize Constants This section describles several directives that assemble values for the current section. The .bes and .space directives reserve a specified number of bits in the current section. The assembler fills these reserved bits with 0s. You can reserve words by multiplying the desired number of words by 16.
Page 95: The .Field Directive
Directives That Initialize Constants The .byte, .ubyte, .char, and .uchar directives place one or more 8-bit values into consecutive words of the current section. These directives are similar to .word and .uword, except that the width of each value is restricted to 8 bits.
Page 96 Directives That Initialize Constants .float and .xfloat calculate the single-precision (32-bit) IEEE floating- point representation of a single floating-point value and store it in two con- secutive words in the current section. The most significant word is stored first. The .float directive automatically aligns to the long word boundary, and .xfloat does not.
Page 97: Initialization Directives
Directives That Initialize Constants 1 000000 00aa .byte 0AAh, 0BBh 000001 00bb 2 000002 0ccc .word 0CCCh 3 000003 0eee .xlong 0EEEEFFFh 000004 efff 4 000006 eeee .long 0EEEEFFFFh 000007 ffff 5 000008 dddd .int 0DDDDh 6 000009 3fff .xfloat 1.99999 00000a ffac 7 00000c 3fff...
Page 98: Directives That Align The Section Program Counter
Directives That Align the Section Program Counter 4.5 Directives That Align the Section Program Counter The .align directive aligns the SPC at a 1-word to 128-word boundary. This ensures that the code following the directive begins on an x-word or page boundary.
Page 99: The .Align Directive
Directives That Align the Section Program Counter Figure 4–4. The .align Directive (a) Result of .align 2 (b) New SPC = 02h after 2 words assembling (a) Current a .align 2 SPC = directive (b) Result of .align without an argument words (b) New SPC = (a) Current...
Page 100: Directives That Format The Output Listing
Directives That Format the Output Listing 4.6 Directives That Format the Output Listing The following directives format the listing file: The .drlist directive causes printing of the directive lines to the listing; the .drnolist directive turns it off. You can use the .drnolist directive to suppress the printing of the following directives: .asg .eval,...
Page 101 Directives That Format the Output Listing The .sslist and .ssnolist directives allow and suppress substitution symbol expansion listing. These directives are useful for debugging the expansion of substitution symbols. The .tab directive defines tab size. The .title directive supplies a title that the assembler prints at the top of each page.
Page 102: Directives That Reference Other Files
Directives That Reference Other Files 4.7 Directives That Reference Other Files These directives supply information for or about other files: The .copy and .include directives tell the assembler to begin reading source statements from another file. When the assembler finishes reading the source statements in the copy/include file, it resumes reading source statements from the current file.
Page 103: Conditional Assembly Directives
Conditional Assembly Directives 4.8 Conditional Assembly Directives Conditional assembly directives enable you to instruct the assembler to assemble certain sections of code according to a true or false evaluation of an expression. Two sets of directives allow you to assemble conditional blocks of code: The .if /.elseif /.else /.endif directives tell the assembler to conditionally assemble a block of code according to the evaluation of an expression.
Page 104: Assembly-Time Symbol Directives
Assembly-Time Symbol Directives 4.9 Assembly-Time Symbol Directives Assembly-time symbol directives equate meaningful symbol names to con- stant values or strings. The .asg directive assigns a character string to a substitution symbol. The value is stored in the substitution symbol table. When the assembler encounters a substitution symbol, it replaces the symbol with its character string value.
Page 105 Assembly-Time Symbol Directives The .tag directive assigns a label to a structure. This simplifies the sym- bolic representation and also provides the ability to define structures that contain other structures. The .tag directive does not allocate memory, and the structure tag (stag) must be defined before it is used. type .struct ;...
Page 106: Miscellaneous Directives
Miscellaneous Directives 4.10 Miscellaneous Directives These directives enable miscellaneous functions or features: The .algebraic directive tells the assembler that the file contains algebraic assembly source code. This must be the first line in the file if the –mg as- sembler option is not used. The .c_mode directive tells the assembler that calls and branches are within the normal 16-bit address range.
Page 107 Miscellaneous Directives These three directives enable you to define your own error and warning messages: The .emsg directive sends error messages to the standard output device. The .emsg directive generates errors in the same manner as the assembler, incrementing the error count and preventing the assembler from producing an object file.
Page 108: Directives Reference
Directives Reference 4.11 Directives Reference The remainder of this chapter is a reference. Generally, the directives are organized alphabetically, one directive per page. Related directives (such as .if /.else/.endif), however, are presented together on one page. Directive ....Page Directive .
Page 109 .algebraic File Contains Algebraic Assembly Source Syntax .algebraic Description The .algebraic directive tells the assembler that this file contains algebraic assembly source code. This directive must be the first line in the file if the –mg option is not used. Note: Mixing Algebraic and Mnemonic Assembly Code Algebraic and mnemonic assembly code cannot be mixed within the same source file.
Page 110 .align/.even Align SPC on a Boundary Syntax .align [ size ] .even Description The .align directive aligns the section program counter (SPC) on the next boundary, depending on the size parameter. The size may be any power of 2, although only certain values are useful for alignment. An operand of 128 aligns the SPC on the next page boundary, and this is the default if no size is given.
Page 111: Constants
.asg/.eval Assign Character Strings to Substitution Symbols Syntax .asg [ ” ] character string [ ” ] , substitution symbol .eval well-defined expression, substitution symbol Description The .asg directive assigns character strings to substitution symbols. Substitu- tion symbols are stored in the substitution symbol table. The .asg directive can be used in many of the same ways as the .set directive, but while .set assigns a constant value (which cannot be redefined) to a symbol, .asg assigns a char- acter string (which can be redefined) to a substitution symbol.
Page 112 .asg/.eval Assign Character Strings to Substitution Symbols Example This example shows how .asg and .eval can be used. .sslist;show expanded sub. symbols .asg/.eval example .asg *+, INC .asg AR0, FP 8 000000 f000 #100, A 000001 0064 9 000002 6d90 *FP+ *AR0+ 10 000003 6d90...
Page 113 .bss Reserve Space in the .bss Section Syntax .bss symbol, size in words [, [ blocking flag ] [, alignment flag ] ] Description The .bss directive reserves space for variables in the .bss section. This direc- tive is usually used to allocate variables in RAM. The symbol is a required parameter.
Page 114: Allocating .Bss Blocks Within A Page
.bss Reserve Space in the .bss Section The blocking option allows you to reserve up to 128 words in the .bss section and ensure that they fit on one page of memory. (Of course, you can reserve more than 128 words at a time, but they cannot fit on a single page.) The follow- ing example code reserves two blocks of space in the .bss section.
Page 115 .bss Reserve Space in the .bss Section Example In this example, the .bss directive is used to allocate space for two variables, TEMP and ARRAY. The symbol TEMP points to 4 words of uninitialized space (at .bss SPC = 0). The symbol ARRAY points to 100 words of uninitialized space (at .bss SPC = 04h);...
Page 116 .byte Initialize Bytes Syntax .byte value [, ... , value .ubyte value [, ... , value .char value [, ... , value .uchar value [, ... , value Description The .byte, .ubyte, .char, and .uchar directives place one or more bytes into consecutive words of the current section.
Page 117 .clink Conditionally Leave Section Out of COFF Output Syntax .clink [ ”section name“ ] Description The .clink directive sets up conditional linking for a section by setting the STYP_CLINK flag in the type field for section name . The .clink directive can be applied to initialized or uninitialized sections.
Page 118 .c_mode Specify C Runtime Environment Syntax .c_mode Description The .c_mode directive is generated as a header for any assembly file created by the C compiler. This directive works primarily in conjunction with the –mf assembler option or the .far_mode directive to facilitate linking a program that uses extended ad- dressing.
Page 119 .copy/.include Read Source File Syntax .copy [”] filename [”] .include [”] filename [”] Description The .copy and .include directives tell the assembler to read source state- ments from a different file. The statements that are assembled from a copy file are printed in the assembly listing.
Page 120 .copy/.include Read Source File Example 1 In this example, the .copy directive is used to read and assemble source state- ments from other files; then the assembler resumes assembling into the cur- rent file. The original file, copy.asm, contains a .copy statement copying the file byte.asm.
Page 121 .copy/.include Read Source File Example 2 In this example, the .include directive is used to read and assemble source statements from other files; then the assembler resumes assembling into the current file. The mechanism is similar to the .copy directive, except that state- ments are not printed in the listing file.
Page 122 .data Assign Character Strings to Substitution Symbols Syntax .data Description The .data directive tells the assembler to begin assembling source code into the .data section; .data becomes the current section. The .data section is nor- mally used to contain tables of data or preinitialized variables. The assembler assumes that .text is the default section.
Page 123 .double/.ldouble Initialize Double-Precision Floating-Point Value Syntax .double value [, ... , value .ldouble value [, ... , value Description The .double and .ldouble directives place the IEEE single-precision floating- point representation of one or more floating-point values into the current sec- tion.
Page 124 .drlist/.drnolist Controls Listing of Directives Syntax .drlist .drnolist Description Two directives enable you to control the printing of assembler directives to the listing file: The .drlist directive enables the printing of all directives to the listing file. The .drnolist directive suppresses the printing of the following directives to the listing file: .asg .fcnolist...
Page 125 .emsg/.mmsg/.wmsg Define Messages Syntax .emsg string .mmsg string .wmsg string Description These directives allow you to define your own error and warning messages. The assembler tracks the number of errors and warnings it encounters and prints these numbers on the last line of the listing file. The .emsg directive sends error messages to the standard output device in the same manner as the assembler, incrementing the error count and prevent- ing the assembler from producing an object file.
Page 126 .else parm1, A .endif 1 Error, No Warnings In addition, the following messages are sent to standard output by the assem- bler: TMS320C54x COFF Assembler Version x.xx Copyright (c) 1998 Texas Instruments Incorporated PASS 1 PASS 2 “emsg.asm”, ERROR! at line 12: [***** USER ERROR ***** –] ERROR –– MISSING PARAMETER .emsg ”ERROR ––...
Page 127 .end End Assembly Syntax .end Description The .end directive is optional and terminates assembly. It should be the last source statement of a program. The assembler ignores any source statements that follow a .end directive. This directive has the same effect as an end-of-file character. You can use .end when you’re debugging and would like to stop assembling at a specific point in your code.
Page 128 .far_mode Specify Far Calls and Branches Syntax .far_mode Description The .far_mode directive tells the assembler that the assembly file uses ex- tended addressing: calls and branches extend beyond the normal 16-bit range. This directive has the same effect as using the –mf assembler option. If your program uses extended addressing, and your assembly code was not generated by the C compiler, you should add the .c_mode directive to your as- sembly files.
Page 129 .fclist/.fcnolist Control the Listing of False Conditional Blocks Syntax .fclist .fcnolist Description Two directives enable you to control the listing of false conditional blocks. The .fclist directive allows the listing of false conditional blocks (conditional blocks that do not produce code). The .fcnolist directive suppresses the listing of false conditional blocks until a .fclist directive is encountered.
Page 130 .field Initialize Field Syntax .field value [, size in bits ] Description The .field directive can initialize multiple-bit fields within a single word of memory. This directive has two operands: The value is a required parameter; it is an expression that is evaluated and placed in the field.
Page 131 .field Initialize Field Example This example shows how fields are packed into a word. Notice that the SPC does not change until a word is filled and the next word is begun. ************************************ Initialize a 14–bit field. ************************************ 4 000000 2AF0 .field 0ABCh, 14 ************************************...
Page 132: The .Field Directive
.field Initialize Field Figure 4–6 shows how the directives in this example affect memory. Figure 4–6. The .field Directive Word Code (a) 0 0 0 1 0 1 0 1 0 1 1 1 1 0 0 .field 0ABCh, 14 14-bit field (b) 0 0 0 1 0 1 0 1 0 1 1 1 1 0 0...
Page 133 .float/.xfloat Initialize Floating-Point Value Syntax .float value [, ... , value .xfloat value [, ... , value Description The .float and .xfloat directives place the floating-point representation of one or more floating-point constants into the current data section. The value must be a floating-point constant or a symbol that has been equated to a floating- point constant.
Page 134 .global/.def/.ref Identify Global Symbols Syntax .global symbol [, ... , symbol .def symbol [, ... , symbol .ref symbol [, ... , symbol Description The .global, .def, and .ref directives identify global symbols, which are de- fined externally or can be referenced externally. The .def directive identifies a symbol that is defined in the current module and can be accessed by other files.
Page 135 .global/.def/.ref Identify Global Symbols file1.lst: ; Global symbol defined in this file .global INIT ; Global symbols defined in file2.lst .global X, Y, Z 5 000000 INIT: 6 000000 F000 #56h, A 000001 0056 7 000002 0000! .word .end file2.lst: ;...
Page 136 .global/.def/.ref Identify Global Symbols file4.lst: ; Global symbols defined in this file .def X, Y, Z ; Global symbol defined in file3.lst .ref INIT 0001 .set 0002 .set 0003 .set 8 000000 0000! .word INIT .end Assembler Directives 4-53...
Page 137 .half/.uhalf/.short/.ushort Initialize 16-bit Integer Syntax .half value [, ... , value .uhalf value [, ... , value .short value [, ... , value .ushort value [, ... , value Description The .half, .uhalf, .short, and .ushort directives place one or more values into consecutive 16-bit fields in the current section.
Page 138 .half/.uhalf/.short/.ushort Initialize 16-bit Integer Example 1 In this example, the .half directive is used to place 16-bit values (10, –1, abc, and a) into memory; .short is used to place 16-bit values (8, –3, def, and b) into memory. The label STRN has the value 106h, which is the location of the first initialized word.
Page 139 .if/.elseif/.else/.endif Assign Character Strings to Substitution Symbols Syntax .if well-defined expression .elseif well-defined expression .else .endif Description The following directives provide conditional assembly: The .if directive marks the beginning of a conditional block. The well-defined expression is a required parameter. If the expression evaluates to true (nonzero), the assembler assembles the code that follows the expression (up to a .elseif, .else, or .endif).
Page 140 .if/.elseif/.else/.endif Assemble Conditional Blocks Example This example shows conditional assembly. SYM1 .set SYM2 .set SYM3 .set SYM4 .set If_4: .if SYM4 = SYM2 * SYM2 7 000000 0004 .byte SYM4 ; Equal values .else .byte SYM2 * SYM2 ; Unequal values .endif If_5: .if SYM1 <= 10...
Page 141 .int/.uint/.word/.uword Initialize 16-bit Integer Syntax .int value [, ... , value .uint value [, ... , value .word value [, ... , value .uword value [, ... , value Description The .int, .uint, .word, and .uword directives are equivalent; they place one or more values into consecutive 16-bit fields in the current section.
Page 142 .label Create a Relocatable Label Syntax .label symbol The .label directive defines a special symbol that refers to the loadtime ad- Description dress rather than the runtime address within the current section. Most sections created by the assembler have relocatable addresses. The assembler as- sembles each section as if it started at 0, and the linker relocates it to the ad- dress at which it loads and runs.
Page 143 .length/.width Set Listing Page Size Syntax .length page length .width page width Description The .length directive sets the page length of the output listing file. It affects the current and following pages. You can reset the page length with another .length directive.
Page 144 .list/.nolist Start/Stop Source Listing Syntax .list .nolist Description Two directives enable you to control the printing of the source listing: The .list directive allows the printing of the source listing. The .nolist directive suppresses the source listing output until a .list direc- tive is encountered.
Page 145 .list/.nolist Start/Stop Source Listing Source file: .copy ”copy2.asm” * Back in original file .nolist .copy ”copy2.asm” .list * Back in original file .string ”Done” Listing file: .copy ”copy2.asm” * In copy2.asm (copy file) 2 000000 0020 .word 32, 1 + ’A’ 000001 0042 * Back in original file 3 000002 F495...
Page 146 .long/.ulong/.xlong Initialize Long Word Syntax .long value [, ... , value .ulong value [, ... , value .xlong value [, ... , value Description The .long, .ulong, and .xlong directives place one or more 32-bit values into consecutive words in the current section. The most significant word is stored first.
Page 147 .long/.ulong/.xlong Initialize Long Word Example This example shows how the .long and .xlong directives initialize double words. 1 000000 0000 DAT1: .long 0ABCDh, ’A’ + 100h, ’g’, ’o’ 000001 ABCD 000002 0000 000003 0141 000004 0000 000005 0067 000006 0000 000007 006F 2 000008 0000’...
Page 148 .loop/.break/.endloop Assign Character Strings to Substitution Symbols Syntax .loop [ well-defined expression ] .break [ well-defined expression ] .endloop Description Three directives enable you to repeatedly assemble a block of code. The .loop directive begins a repeatable block of code. The optional expression evaluates to the loop count (the number of loops to be performed).
Page 149 .macro/.endm Define Macro Syntax macname .macro [ parameter ] [, ... parameter model statements or macro directives .endm Description The .macro directive is used to define macros. You can define a macro anywhere in your program, but you must define the macro before you can use it.
Page 150 .mlib Define Macro Library Syntax .mlib [”] filename [”] Description The .mlib directive provides the assembler with the name of a macro library. A macro library is a collection of files that contain macro definitions. These files are bound into a single file (called a library or archive) by the archiver. Each member of a macro library may contain one macro definition that corresponds to the name of the file.
Page 151 .mlib Define Macro Library Example This example creates a macro library that defines two macros, incr and decr. The file incr.asm contains the definition of incr, and decr.asm contains the defi- nition of decr. incr.asm decr.asm * Macro for incrementing * Macro for zero accumulators incr .macro...
Page 152 .mlist/.mnolist Start/Stop Expansion Listing Syntax .mlist .mnolist Description Two directives enable you to control the listing of macro and repeatable block expansions in the listing file: The .mlist directive allows macro and .loop/.endloop block expansions in the listing file. The .mnolist directive suppresses macro and .loop/.endloop block expansions in the listing file.
Page 153: Memory-Mapped Registers
.mmregs Assign Memory–Mapped Register Names as Global Symbols Syntax .mmregs Description The .mmregs directive defines global symbolic names for the ’C54x registers and places them in the global symbol table. It is equivalent to executing AL .set 8, AH .set 9, etc. The symbols are local and absolute. Using the .mmregs direc- tive makes it unnecessary to define these symbols.
Page 154 .mmregs Assign Memory-Mapped Register Names as Global Symbols Table 4–2. Memory-Mapped Registers (Continued) Hexadecimal- Name Description Address BDDR0 0020 BSP0 data receive register 0020 Data receive register DXR0 0021 Data transmit register 0 BDXR 0021 Data transmit register BDXR0 0021 Data transmit register 0021 Data transmit register...
Page 155 .mmregs Assign Memory-Mapped Register Names as Global Symbols Table 4–2. Memory-Mapped Registers (Continued) Hexadecimal- Name Description Address SPC1 0032 Serial port control register 1 TSPC 0032 Serial port control register TRAD 0035 TDM receive address register 0038 ABU transmit address register TCSR 0033 TDM channel select register...
Page 156 .newblock Terminate Local Symbol Block Syntax .newblock Description The .newblock directive undefines any local labels currently defined. Local labels, by nature, are temporary; the .newblock directive resets them and terminates their scope. A local label is a label in the form $n, where n is a single decimal digit. A local label, like other labels, points to an instruction word.
Page 157 .option Select Listing Options Syntax .option option list Description The .option directive selects several options for the assembler output listing. Option list is a list of options separated by vertical lines; each option selects a listing feature. These are valid options: limits the listing of .byte directives to one line.
Page 158 .option Select Listing Options Example This example shows how to limit the listings of the .byte, .word, .long, and .string directives to one line each. **************************************** ** Limit the listing of .byte, .word, ** ** .long, and .string directives to 1 line each. **************************************** .option B, W, L, T 7 000000 00BD...
Page 159 This example shows how the .page directive causes the assembler to begin a new page of the source listing. Source file: .title ”**** Page Directive Example ****” .page Listing file: TMS320C54x COFF Assembler Version x.xx Copyright (c) 1998 Texas Instruments Incorporated **** Page Directive Example **** PAGE TMS320C54x COFF Assembler Version x.xx...
Page 160 .sblock Specify Blocking for an Initialized Section Syntax .sblock [”] section name [”] [, ” section name ”, . . . ] Description The .sblock directive designates sections for blocking. Blocking is an address alignment mechanism similar to page alignment, but weaker. A blocked section is guaranteed to not cross a page boundary (128 words) if it is smaller than a page, or to start on a page boundary if it is larger than a page.
Page 161 .sect Assign Character Strings to Substitution Symbols Syntax .sect ” section name ” Description The .sect directive defines a named section that can be used like the default .text and .data sections. The .sect directive begins assembling source code into the named section. The section name identifies a section that the assembler assembles code into.
Page 162 .set/.equ Define Assembly-Time Constant Syntax symbol .set value symbol .equ value Description The .set and .equ directives equate a constant value to a symbol. The symbol can then be used in place of a value in assembly source. This allows you to equate meaningful names with constants and other values.
Page 163 .space/.bes Reserve Space Syntax .space size in bits .bes size in bits Description The .space and .bes directives reserve size number of bits in the current sec- tion and fill them with 0s. When you use a label with the .space directive, it points to the first word reserved.
Page 164 .sslist/.ssnolist Control Listing of Substitution Symbols Syntax .sslist .ssnolist Description Two directives enable you to control substitution symbol expansion in the list- ing file: The .sslist directive allows substitution symbol expansion in the listing file. The expanded line appears below the actual source line. The .ssnolist directive suppresses substitution symbol expansion in the listing file.
Page 165 .sslist/.ssnolist Control Listing of Substitute Symbols (b) Algebraic example 1 000000 .bss ADDRX, 1 2 000001 .bss ADDRY, 1 3 000002 .bss ADDRA, 1 4 000003 .bss ADDRB, 1 ADD2 .macro ADDRA, ADDRB A = @ADDRA A = A + @ADDRB @ADDRB = A .endm 11 0000008094...
Page 166 .string/.pstring Initialize Text Syntax .string ” string ” [, ... , ” string ”] .pstring ” string ” [, ... , ” string ”] Description The .string and .pstring directives place 8-bit characters from a character string into the current section. With the .string directive, each 8-bit character has its own 16-bit word, but with the .pstring directive, the data is packed so that each word contains two 8-bit bytes.
Page 167 .struct/.endstruct/.tag Declare Structure Type Syntax [ stag ] .struct [ expr ] [ mem element [ expr [ mem element [ expr [ mem .tag stag [, expr [ mem element [ expr [ size ] .endstruct label .tag stag Description The .struct directive assigns symbolic offsets to the elements of a data struc- ture definition.
Page 168 .struct/.endstruct/.tag Declare Structure Type is an optional label for a member of the structure. This label is absolute and equates to the present offset from the beginning of the structure. A label for a structure member cannot be declared global. element is one of the following descriptors: .byte, .char, .double, field, .float, .half, .int, .long, .short, .string, .ubyte, .uchar, .uhalt, .uint,...
Page 169 .struct/.endstruct/.tag Declare Structure Types Example 1 REAL_REC .struct ; stag 0000 .int ; member1 = 0 0001 .int ; member2 = 1 0002 REAL_LEN .endstruct ; real_len = 2 6 000000 0001– REAL + REAL_REC.DEN, A ; access structure element 9 000000 .bss REAL, REAL_LEN ;...
Page 170 .tab Define Tab Size Syntax .tab size Description The .tab directive defines the tab size. Tabs encountered in the source input are translated to size spaces in the listing. The default tab size is eight spaces. Example Each of the following lines consists of a single tab character followed by an NOP instruction.
Page 171: Sections Directives
.text Assemble Into .text Sections Syntax .text Description The .text directive tells the assembler to begin assembling into the .text sec- tion, which usually contains executable code. The section program counter is set to 0 if nothing has yet been assembled into the .text section. If code has already been assembled into the .text section, the section program counter is restored to its previous value in the section.
Page 172 Source file: .title ”**** Fast Fourier Transforms ****” .title ”**** Floating–Point Routines ****” .page Listing file: TMS320C54x COFF Assembler Version x.xx Copyright (c) 1998 Texas Instruments Incorporated **** Fast Fourier Transforms **** PAGE TMS320C54x COFF Assembler Version x.xx...
Page 173 .union/.endunion/.tag Declare Union Type Syntax [ utag ] .union [ expr ] [ mem element [ expr [ mem element [ expr [ mem .tag utag [, expr [ mem element [ expr [ size ] .endunion label .tag utag Description The .union directive assigns symbolic offsets to the elements of alternate data structure definitions to be allocated in the same memory space.
Page 174 .union/.endunion/.tag Declare Union Type utag is the union’s tag. Its value is associated with the beginning of the union. If no utag is present, the assembler puts the union members in the global symbol table with the value of their abso- lute offset from the top of the union.
Page 175 .union/.endunion/.tag Declare Union Types Example 1 .global employid xample .union ; utag 0000 ival .word ; member1 = int 0000 fval .float ; member2 = float 0000 sval .string ; member3 = string 0002 real_len .endunion ; real_len = 2 8 000000 .bss employid, real_len...
Page 176 .usect Reserve Uninitialized Space Syntax symbol .usect ” section name ” , size in words [, [ blocking flag ] [, alignment flag ]] Description The .usect directive reserves space for variables in an uninitialized, named section. This directive is similar to the .bss directive; both simply reserve space for data and have no contents.
Page 177 .usect Reserve Uninitialized Space For more information about COFF sections, see Chapter 2, Introduc- tion to Common Object File Format . Example This example uses the .usect directive to define two uninitialized, named sec- tions, var1 and var2. The symbol ptr points to the first word reserved in the var1 section.
Page 178: The .Usect Directive
.usect Reserve Uninitialized Space Figure 4–7. The .usect Directive section var1 section var2 1 word array 100 words 100 words 100 words reserved in var2 dflag 50 words 151 words reserved in var1 Assembler Directives 4-95...
Page 179 .var Use Substitution Symbols as Local Variables Syntax .var sym [,sym , ... , sym Description The .var directive allows you to use substitution symbols as local variables within a macro. With this directive, you can define up to 32 local macro sub- stitution symbols (including parameters) per macro.
Page 180 .version Determine Device Syntax .version value Description The .version directive determines for which processor instructions are built. Use one of the following for value : 545LP 546LP Assembler Directives 4-97...
Page 181: Macro Language
Chapter 5 Macro Language The assembler supports a macro language that enables you to create your own instructions. This is especially useful when a program executes a particular task several times. The macro language lets you: Define your own macros and redefine existing macros Simplify long or complicated assembly code Access macro libraries created with the archiver Define conditional and repeatable blocks within a macro...
Page 182: Using Macros
Using Macros 5.1 Using Macros Programs often contain routines that are executed several times. Instead of repeating the source statements for a routine, you can define the routine as a macro, then call the macro in the places where you would normally repeat the routine.
Page 183: Defining Macros
Defining Macros 5.2 Defining Macros You can define a macro anywhere in your program, but you must define the macro before you can use it. Macros can be defined at the beginning of a source file, in an .include/.copy file, or in a macro library. For more information about macro libraries, see Section 5.4, Macro Libraries , on page 5-14.
Page 184: Macro Definition, Call, And Expansion
Defining Macros [.mexit] functions as a goto .endm statement. The .mexit directive is useful when error testing confirms that macro expansion will fail. .endm terminates the macro definition. To include comments with your macro definition that do not appear in the macro expansion, pre- cede your comments with an exclamation point.
Page 185 Defining Macros (b) Algebraic example add3 ADDRP = P1 + P2 + P3 add3 .macro P1, P2, P3, ADDRP A = @P1 A = A + @P2 A = A + @P3 @ADDRP = A .endm .global abc, def, ghi, adr 18 000000 add3 abc, def, ghi, adr 000000 1000!
Page 186: Macro Parameters/Substitution Symbols
Macro Parameters/Substitution Symbols 5.3 Macro Parameters/Substitution Symbols If you want to call a macro several times with different data each time, you can assign parameters within the macro. The macro language supports a special symbol, called a substitution symbol , which is used for macro parameters. 5.3.1 Substitution Symbols Macro parameters are substitution symbols that represent a character string.
Page 187: Calling A Macro With Varying Numbers Of Arguments
Macro Parameters/Substitution Symbols Example 5–2. Calling a Macro With Varying Numbers of Arguments Macro definition Parms .macro a,b,c a = :a: b = :b: c = :c: .endm Calling the macro: Parms 100,label Parms 100,label,x,y a = 100 a = 100 b = label b = label c = ”...
Page 188: Directives That Define Substitution Symbols
Macro Parameters/Substitution Symbols 5.3.2 Directives That Define Substitution Symbols You can manipulate substitution symbols with the .asg and .eval directives. The .asg directive assigns a character string to a substitution symbol. The syntax of the .asg directive is: .asg [”] character string [”] , substitution symbol The quotation marks are optional.
Page 189: Functions And Return Values
Macro Parameters/Substitution Symbols In Example 5–4 the .asg directive could be replaced with the .eval directive without changing the output. In simple cases like this, you can use .eval and .asg interchangeably. However, you must use .eval if you want to calculate a value from an expression.
Page 190: Recursive Substitution Symbols
Macro Parameters/Substitution Symbols Example 5–5 shows built-in substitution symbol functions. Example 5–5. Using Built-In Substitution Symbol Functions .asg label, ADDR ; ADDR = label ($symcmp(ADDR,”label”) = 0); evaluates to true ADDR, A .endif .asg ”x,y,z” , list ; list = x,y,z ($ismember(ADDR,list)) ;...
Page 191: Forced Substitution
Macro Parameters/Substitution Symbols 5.3.5 Forced Substitution In some cases, substitution symbols are not recognizable to the assembler. The forced substitution operator, which is a set of colons, enables you to force the substitution of a symbol’s character string. Simply enclose a symbol in colons to force the substitution.
Page 192: Macro Parameters/Substitution Symbols
Macro Parameters/Substitution Symbols 5.3.6 Accessing Individual Characters of Subscripted Substitution Symbols In a macro, you can access the individual characters (substrings) of a substitu- tion symbol with subscripted substitution symbols. You must use the forced substitution operator for clarity. You can access substrings in two ways: : symbol ( well-defined expression ): This method of subscripting evaluates to a character string with one character.
Page 193: Substitution Symbols As Local Variables In Macros
Macro Parameters/Substitution Symbols Example 5–9. Using Subscripted Substitution Symbols to Find Substrings substr .macro start,strg1,strg2,pos .var LEN1,LEN2,I,TMP $symlen(start) = 0 .eval 1,start .endif .eval 0,pos .eval .eval $symlen(strg1),LEN1 .eval $symlen(strg2),LEN2 .loop .break i = (LEN2 – LEN1 + 1) .asg ”:strg2(i,LEN1):”,TMP $symcmp(strg1,TMP) = 0 .eval...
Page 194: Macro Libraries
Macro Libraries 5.4 Macro Libraries One way to define macros is by creating a macro library. A macro library is a collection of files that contain macro definitions. You must use the archiver to collect these files, or members, into a single file (called an archive). Each member of a macro library contains one macro definition.
Page 195: Built-In Substitution Symbol Functions Used In A Conditional Assembly
Using Conditional Assembly in Macros 5.5 Using Conditional Assembly in Macros The conditional assembly directives are .if/.elseif/.else/.endif and .loop/ .break/.endloop. They can be nested within each other up to 32 levels deep. The format of a conditional block is: .if well-defined expression [.elseif well-defined expression ] [.else well-defined expression] .endif...
Page 196: Code Block
Using Conditional Assembly in Macros Example 5–10. The .loop/.break/.endloop Directives .asg .loop .break (x == 10) ; if x == 10, quit loop/break with expression .eval x+1,x .endloop Example 5–11. Nested Conditional Assembly Directives .asg .loop .if (x == 10) ; if x == 10 quit loop .break force break...
Page 197: Using Labels In Macros
Using Labels in Macros 5.6 Using Labels in Macros All labels in an assembly language program must be unique, including labels in macros. If a macro is expanded more than once, its labels are defined more than once, which is illegal . The macro language provides a method of defining labels in macros so that the labels are unique.
Page 198 Using Labels in Macros Example 5–13. Unique Labels in a Macro (Continued) (b) Algebraic example ; define macro .macro AVAR, BVAR ; find minimum A = @AVAR A = A – #BVAR if (ALT) goto M1? A = #BVAR goto M2? A = @AVAR .endm ;...
Page 199: Producing Messages In A Macro
Producing Messages in Macros 5.7 Producing Messages in Macros The macro language supports three directives that enable you to define your own assembly-time error and warning messages. These directives are especially useful when you want to create messages specific to your needs. The last line of the listing file shows the error and warning counts.
Page 200 Producing Messages in Macros Example 5–14. Producing Messages in a Macro testparam .macro x,y .if ($symlen(x) == 0) .emsg ”ERROR –– Missing Parameter” .mexit .elseif ($symlen(y) == 0) .emsg ”ERROR == Missing Parameter” .mexit .else LD y, A LD x, B ADD A, B .endif .endm...
Page 201: Formatting The Output Listing
Formatting the Output Listing 5.8 Formatting the Output Listing Macros, substitution symbols, and conditional assembly directives may hide information. You may need to see this hidden information, so the macro language supports an expanded listing capability. By default, the assembler shows macro expansions and false conditional blocks in the output list file.
Page 202: Using Recursive And Nested Macros
Using Recursive and Nested Macros 5.9 Using Recursive and Nested Macros The macro language supports recursive and nested macro calls. This means that you can call other macros in a macro definition. You can nest macros up to 32 levels deep. When you use recursive macros, you call a macro from its own definition (the macro calls itself).
Page 203: Using Recursive Macros
Using Recursive and Nested Macros Example 5–16 shows recursive macros. The fact macro produces assembly code necessary to calculate the factorial of n where n is an immediate value. The result is placed in data memory address loc. The fact macro accomplishes this by calling fact1, which calls itself recursively.
Page 204 Using Recursive and Nested Macros Example 5–16. Using Recursive Macros (Continued) (b) Algebraic example fact .macro N, loc ; n is an integer constant ; loc memory address = n! .if N < 2 ; 0! = 1! = 1 @AR0 = #1 .else @AR0 = #N...
Page 205: Creating Macros
Macro Directives Summary 5.10 Macro Directives Summary Table 5–2. Creating Macros Mnemonic and Syntax Description macname .macro [ parameter ] ... [ parameter Define macro. Identify library containing macro definitions. .mlib filename .mexit Go to .endm. .endm End macro definition. Table 5–3.
Page 206: Producing Assembly-Time Messages
Macro Directives Summary Table 5–5. Producing Assembly-Time Messages Mnemonic and Syntax Description .emsg Send error message to standard output. Send warning message to standard output. .wmsg .mmsg Send warning or assembly-time message to standard output. Table 5–6. Formatting the Listing Mnemonic and Syntax Description .fclist...
Page 207: Archiver Description
Chapter 6 Archiver Description The TMS320C54x archiver combines several individual files into a single archive file. For example, you can collect several macros into a macro library. The assembler will search the library and use the members that are called as macros by the source file.
Page 208: Archiver Overview
Archiver Overview 6.1 Archiver Overview The TMS320C54x archiver lets you combine several individual files into a single file called an archive or a library. Each file within the archive is called a member. Once you have created an archive, you can use the archiver to add, delete, or extract members.
Page 209: Archiver Development Flow
Archiver Development Flow 6.2 Archiver Development Flow Figure 6–1 shows the archiver’s role in the assembly language development process. Both the assembler and the linker accept libraries as input. Figure 6–1. Archiver Development Flow source files Macro source files C compiler Translator Archiver utility...
Page 210: Invoking The Archiver
Invoking the Archiver 6.3 Invoking the Archiver To invoke the archiver, enter: ar500 [ – ] command [ option ] libname [ filename ... filename ar500 is the command that invokes the archiver. command tells the archiver how to manipulate the library members. A command can be preceded by an optional hyphen.
Page 211 Invoking the Archiver option tells the archiver how to function. Specify as many of the following options as you want: –q (quiet) suppresses the banner and status messages. –s prints a list of the global symbols that are defined in the library.
Page 212: Archiver Examples
The following are some archiver examples: If you want to create a library called function.lib that contains the files sine.obj, cos.obj, and flt.obj, enter: ar500 –a function sine.obj cos.obj flt.obj TMS320C54x Archiver Version x.xx Copyright (c) 1998 Texas Instruments Incorporated ==>...
Page 213: Linker Description
Chapter 7 Linker Description The TMS320C54x linker creates executable modules by combining COFF object files. The concept of COFF sections is basic to linker operation. Chapter 2, Introduction to Common Object File Format , discusses the COFF format in detail.
Page 214: Linker Overview
Linker Overview 7.1 Linker Overview The TMS320C54x linker allows you to configure system memory by allocating output sections efficiently into the memory map. As the linker combines object files, it performs the following tasks: Allocates sections into the target system’s configured memory.
Page 215: Linker Development Flow
The linker accepts several types of files as input, including object files, command files, libraries, and partially linked files. The linker creates an executable COFF object module that can be downloaded to one of several development tools or executed by a TMS320C54x device. Figure 7–1. Linker Development Flow source...
Page 216: Invoking The Linker
Invoking the Linker 7.3 Invoking the Linker The general syntax for invoking the linker is: lnk500 [ –options ] filename ..filename lnk500 is the command that invokes the linker. options can appear anywhere on the command line or in a linker command file.
Page 217 Invoking the Linker Put filenames and options in a linker command file. For example, assume that the file linker.cmd contains the following lines: –o link.out file1.obj file2.obj Now you can invoke the linker from the command line; specify the command filename as an input file: linker.cmd lnk500 When you use a command file, you can also specify other options and files...
Page 218: Linker Options
Disable merge of symbolic debugging information. – c Use linking conventions defined by the ROM autoin- itialization model of the TMS320C54x C compiler. – cr Use linking conventions defined by the RAM autoin- itialization model of the TMS320C54x C compiler.
Page 219 Linker Options – m filename Produce a map or listing of the input and output sec- tions, including holes, and place the listing in filename. – o filename Name the executable output module. The default file- name is a . out. The directory or filename must follow operating system conventions.
Page 220: Relocation Capabilities (– A And – R Options)
Linker Options 7.4.1 Relocation Capabilities (–a and –r Options) The linker performs relocation, which is the process of adjusting all references to a symbol when the symbol’s address changes. The linker supports two options (– a and – r) that allow you to produce an absolute or a relocatable output module.
Page 221 Linker Options Producing a Relocatable Output Module (– r Option) When you use the –r option without the –a option, the linker retains relocation entries in the output module. If the output module will be relocated (at load time) or relinked (by another linker execution), use –r to retain the relocation entries.
Page 222: Disable Merge Of Symbolic Debugging Information (–B Option)
Linker Options 7.4.2 Disable Merge of Symbolic Debugging Information (–b Option) By default, the linker eliminates duplicate entries of symbolic debugging information. Such duplicate information is commonly generated when a C program is compiled for debugging. For example: –[ header.h ]– typedef struct <define some structure members>...
Page 223: Define An Entry Point (–E Global_Symbol Option)
Linker Options Define an Entry Point (–e global_symbol Option) 7.4.4 The memory address at which a program begins executing is called the entry point . When a loader loads a program into target memory, the program counter must be initialized to the entry point; the PC then points to the beginning of the program.
Page 224: Make A Symbol Global (–G Global_Symbol Option)
Linker Options Make a Symbol Global (–g global_symbol Option) 7.4.6 The –h option makes all global symbols static. If you have a symbol that you want to remain global and you use the –h option, you can use the –g option to declare that symbol to be global.
Page 225: Alter The Library Search Algorithm (–L Option, –I Option, And C_Dir Environment Variable)
Linker Options The linker also creates a global symbol _ _SYSMEM_SIZE and assigns it a value equal to the size of the heap. The default size is 1K words. For more information about linking C code, see Section 7.17, Linking C Code , on page 7-67.
Page 226 Linker Options 7.4.9.1 Name an Alternate Library Directory (–i Option) The –i option names an alternate directory that contains object libraries. The syntax for this option is: –i dir The dir names a directory that contains object libraries; the space between –i and the directory name is optional.
Page 227 Linker Options 7.4.9.2 Name an Alternate Library Directory (C_DIR Environment Variable) An environment variable is a system symbol that you define and assign a string to. The linker uses an environment variable named C_DIR to name alternate directories that contain object libraries. The commands for assigning the environment variable are: Operating System Enter...
Page 228: Disable Conditional Linking (–J Option)
If both vari- ables are set, the settings of the processor-specific variable are used. The processor-specific variables are useful when you are using Texas Instruments tools for different processors at the same time. If you are using the tool set for only one type of processor, these environment variables are unnecessary.
Page 229: Name An Output Module (–O Filename Option)
Linker Options This example links file1.obj and file2.obj and creates a map file called file.map: lnk500 file1.obj file2.obj –m file.map Example 7–14 on page 7-73 shows an example of a map file. 7.4.13 Name an Output Module (–o filename Option) The linker creates an output module when no errors are encountered.
Page 230: Define Stack Size (–Stack Constant Option)
Linker Options 7.4.16 Define Stack Size (–stack constant Option) The TMS320C54x C compiler uses an uninitialized section, .stack, to allocate space for the runtime stack. You can set the size of the .stack section at link time with the –stack option. Specify the size in words as a constant immedi- ately after the option: lnk500 –stack 0x1000 /* defines a stack size */...
Page 231: Specify A Coff Format (–V Option)
Linker Options 7.4.18 Specify a COFF Format (–v Option) The –v option specifies the format the linker will use to create the COFF object file. The COFF object file is the output of the linker. The format specifies how information in the object file is arranged. The linker can read and write COFF0, COFF1, and COFF2 formats.
Page 232: Exhaustively Read Libraries (–X Option)
Linker Options 7.4.20 Exhaustively Read Libraries (–x Option) The linker normally reads input files, including archive libraries, only once when they are encountered on the command line or in the command file. When an archive is read, any members that resolve references to undefined symbols are included in the link.
Page 233: Linker Command Files
Linker Command Files 7.5 Linker Command Files Linker command files allow you to put linking information in a file; this is useful when you invoke the linker often with the same information. Linker command files are also useful because they allow you to use the MEMORY and SECTIONS directives to customize your application.
Page 234: Placing Sections In The Memory Map
Linker Command Files Example 7–1 shows a sample linker command file called link.cmd. (Subsection 2.4.2, Placing Sections in the Memory Map , on page 2-14 con- tains another example of a linker command file.) Example 7–1. Linker Command File a.obj First input filename b.obj Second input filename...
Page 235: Command File With Linker Directives
Linker Command Files Blanks and blank lines are insignificant in a command file except as delimiters. This also applies to the format of linker directives in a command file. Example 7–2 shows a sample command file that contains linker directives. (Linker directive formats are discussed in later sections.) Example 7–2.
Page 236: Reserved Names In Linker Command Files
Linker Command Files 7.5.1 Reserved Names in Linker Command Files The following names are reserved as keywords for linker directives. Do not use them as symbol or section names in a command file. align GROUP origin ALIGN l (lowercase L) ORIGIN attr page...
Page 237: Object Libraries
Object Libraries 7.6 Object Libraries An object library is a partitioned archive file that contains complete object files as members. Usually, a group of related modules are grouped together into a library. When you specify an object library as linker input, the linker includes any members of the library that define existing unresolved symbol references.
Page 238 Object Libraries If, however, you enter the following, all the references to clrscr are satisfied by member 1 of libc.lib: lnk500 f1.obj f2.obj libc.lib liba.lib If none of the linked files reference symbols defined in a library, you can use the –u option to force the linker to include a library member.
Page 239: The Memory Directive
7.7.1 Default Memory Model The assembler enables you to assemble code for the TMS320C54x device. The assembler inserts a field in the output file’s header, identifying the device. The linker reads this information from the object file’s header. If you do not use the MEMORY directive, the linker uses a default memory model specific to the named device.
Page 240: The Memory Directive
The MEMORY Directive When you use the MEMORY directive, be sure to identify all the memory ranges that are available for object code. Memory defined by the MEMORY directive is configured memory ; any memory that you do not explicitly account for with the MEMORY directive is unconfigured memory .
Page 241 The MEMORY Directive The general syntax for the MEMORY directive is: MEMORY PAGE 0 : name 1 [ (attr )] : origin = constant , length = constant; PAGE n : name n [ (attr) ] : origin = constant , length = constant; PAGE identifies a memory space.
Page 242 The MEMORY Directive length Specifies the length of a memory range; enter as length , len , or l . The value, specified in words, is a 16-bit constant and may be deci- mal, octal, or hexadecimal. fill Specifies a fill character for the memory range; enter as fill or f . Fills are optional.
Page 243: Memory Map Defined In Example
The MEMORY Directive Figure 7–2. Memory Map Defined in Example 7–3 Data Memory Program Memory 00000h 00000h É É É É É É É É É É 0005Fh É É É É É É É É É É 00060h SCRATCH 0007Fh É...
Page 244: The Sections Directive
The SECTIONS Directive 7.8 The SECTIONS Directive The SECTIONS directive: Describes how input sections are combined into output sections Defines output sections in the executable program Specifies where output sections are placed in memory (in relation to each other and to the entire memory space) Permits renaming of output sections Refer to Section 2.4, How the Linker Handles Sections , on page 2-12 for details on how the linker handles sections.
Page 245 The SECTIONS Directive Each section specification, beginning with name , defines an output section. (An output section is a section in the output file.) After the section name is a list of properties that define the section’s contents and how the section is allocated.
Page 246: Section Allocation Defined By Example
The SECTIONS Directive Example 7–4. The SECTIONS Directive /**************************************************/ Sample command file with SECTIONS directive /**************************************************/ file1.obj file2.obj Input files –o prog.out Options SECTIONS SECTIONS directive .text: load = ROM, run = 800h .const: load = ROM .bss: load = RAM .vectors: load = FF80h t1.obj(.intvec1)
Page 247: Allocation
The SECTIONS Directive 7.8.3 Allocation The linker assigns each output section two locations in target memory: the location where the section will be loaded and the location where it will be run. Usually, these are the same, and you can think of each section as having only a single address.
Page 248 The SECTIONS Directive Blocking uses the block keyword to specify that the section must fit between two address boundaries: if the section is too big, it will start on an address boundary. .text: block(0x80) Page specifies the memory page to be used (see Section 7.11, Overlay Pages , on page 7-48).
Page 249 The SECTIONS Directive 7.8.3.2 Named memory You can allocate a section into a memory range that is defined by the MEMORY directive. This example names ranges and links sections into them: MEMORY ROM (RIX) origin = 0C00h, length = 1000h RAM (RWIX) : origin = 0080h, length = 1000h...
Page 250: The Most Common Method Of Specifying Section Contents
The SECTIONS Directive 7.8.3.3 Alignment and blocking You can tell the linker to place an output section at an address that falls on an n-word boundary, where n is a power of 2. For example: .text: load = align(128) allocates .text so that it falls on a 128-word boundary. Blocking is a weaker form of alignment that allocates a section anywhere within a block of size n.
Page 251 The SECTIONS Directive You can explicitly specify the input sections that form an output section. Each input section is identified by its filename and section name: SECTIONS .text : /* Build .text output section f1.obj(.text) /* Link .text section from f1.obj f2.obj(sec1) /* Link sec1 section from f2.obj f3.obj...
Page 252 The SECTIONS Directive The following example illustrates the two purposes above: SECTIONS .text abc.obj(xqt) *(.text) .data *(.data) fil.obj(table) In this example, the .text output section contains a named section xqt from file abc.obj, which is followed by all the .text input sections. The .data section contains all the .data input sections, followed by a named section table from the file fil.obj.
Page 253: The Union Statement
Specifying a Section’s Runtime Address 7.9 Specifying a Section’s Runtime Address At times, you may want to load code into one area of memory and run it in another. For example, you may have performance-critical code in a ROM- based system. The code must be loaded into ROM, but it would run faster in RAM.
Page 254: Uninitialized Sections
Specifying a Section’s Runtime Address The examples below specify load and run addresses: .data: load = ROM, align = 32, run = RAM (align applies only to load ) .data: load = (ROM align 32), run = RAM (identical to previous example) .data: run RAM, align 32, load...
Page 255 Specifying a Section’s Runtime Address Example 7–6. Copying a Section From ROM to RAM ;––––––––––––––––––––––––––––––––––––––––––––––––––––––– define a section to be copied from ROM to RAM ;––––––––––––––––––––––––––––––––––––––––––––––––––––––– .sect ”.fir” .label fir_src ; load address of section fir: ; run address of section <code here>...
Page 256: Runtime Execution Of Example
Specifying a Section’s Runtime Address Figure 7–4 illustrates the runtime execution of this example. Figure 7–4. Runtime Execution of Example 7–6 Program Memory Data Memory 800h 800h ONCHIP DATA fir (relocated .fir to run here) (loads here) 2C00h PROG .text FE00h 7-44...
Page 257: Using Union And Group Statements
Using UNION and GROUP Statements 7.10 Using UNION and GROUP Statements Two SECTIONS statements allow you to conserve memory: GROUP and UNION. Unioning sections causes the linker to allocate them to the same run address. Grouping sections causes the linker to allocate them contiguously in memory.
Page 258: Memory Allocation Shown In Example 7-7 And Example
Using UNION and GROUP Statements Figure 7–5. Memory Allocation Shown in Example 7–7 and Example 7–8 Allocation for Example 7–7 Allocation for Example 7–8 Sections can run Copies at .bss2 .text 2 (run) as a union. This is runtime .bss1 .text 1 (run) runtime allocation only.
Page 259: Grouping Output Sections Together
Using UNION and GROUP Statements 7.10.2 Grouping Output Sections Together The SECTIONS directive has a GROUP option that forces several output sections to be allocated contiguously. For example, assume that a section named term_rec contains a termination record for a table in the .data section. You can force the linker to allocate .data and term_rec together: Example 7–9.
Page 260: Overlay
Overlay Pages 7.11 Overlay Pages Some target systems use a memory configuration in which all or part of the memory space is overlaid by shadow memory. This allows the system to map different banks of physical memory into and out of a single address range in response to hardware selection signals.
Page 261: Overlay Pages Defined By Example 7-10 And Example
Overlay Pages Example 7–10 defines three separate address spaces. PAGE 0 defines an area of on-chip program memory and the rest of program memory space. PAGE 1 defines the first overlay memory area and the rest of data memory space. PAGE 2 defines another area of overlay memory for data space. Both OVR_MEM ranges cover the same address range.
Page 262: Using Overlay Pages With The Sections Directive
Overlay Pages 7.11.2 Using Overlay Pages With the SECTIONS Directive Assume that you are using the MEMORY directive as shown in Example 7–10. Further assume that your code consists of, besides the usual sections, four modules of code that you want to load in data memory space but that you intend to run in the on-chip RAM in program memory space.
Page 263: Page Definition Syntax
Overlay Pages Within a page, you can bind output sections or use named memory areas in the usual way. In Example 7–11, S1 could have been allocated: S1 : load = 01200h, page = 1 { . . . } This binds S1 at address 1200h in page 1.
Page 264 Overlay Pages Memory ranges listed outside the scope of a PAGE specification default to PAGE 0. Consider the following example: MEMORY : org = 0h len = 1000h EPROM : org = 1000h len = 1000h : org = 2000h len = 0E000h PAGE1: XROM...
Page 265: Default Allocation Algorithm
7.12.1 Allocation Algorithm If you do not use the MEMORY and SECTIONS directives, the linker allocates output sections as though the following definitions are specified. Example 7–12. Default Allocation for TMS320C54x Devices MEMORY PAGE 0: PROG: origin = 0x0080 length = 0xFF00...
Page 266: General Rules For Output Sections
Default Allocation Algorithm 7.12.2 General Rules for Output Sections An output section can be formed in one of two ways: Rule 1 As the result of a SECTIONS directive definition. Rule 2 By combining input sections with the same names into an out- put section that is not defined in a SECTIONS directive.
Page 267 Default Allocation Algorithm 3) Any remaining sections are allocated in the order in which they are defined. Sections not defined in a SECTIONS directive are allocated in the order in which they are encountered. Each output section is placed into the first available memory space, considering alignment where necessary.
Page 268: Special Section Types (Dsect, Copy, And Noload)
A COPY section is similar to a DSECT section, except that its contents and associated information are written to the output module. The .cinit section that contains initialization tables for the TMS320C54x C compiler has this attribute under the RAM model.
Page 269: Assigning Symbols At Link Time
Assigning Symbols at Link Time 7.14 Assigning Symbols at Link Time Linker assignment statements allow you to define external (global) symbols and assign values to them at link time. You can use this feature to initialize a variable or pointer to an allocation-dependent value. 7.14.1 Syntax of Assignment Statements The syntax of assignment statements in the linker is similar to that of assign- ment statements in the C language:...
Page 270: Assigning The Spc To A Symbol
Assigning Symbols at Link Time 7.14.2 Assigning the SPC to a Symbol A special symbol, denoted by a dot ( . ), represents the current value of the SPC during allocation. The linker’s “.” symbol is analogous to the assembler’s $ symbol.
Page 271: Operators Used In Expressions (Precedence)
Assigning Symbols at Link Time Symbols within an expression have only the value of the symbol’s address. No type-checking is performed. Linker expressions can be absolute or relocatable. If an expression contains any relocatable symbols (and zero or more constants or absolute symbols), it is relocatable.
Page 272: Symbols Defined By The Linker
Assigning Symbols at Link Time 7.14.4 Symbols Defined by the Linker The linker automatically defines several symbols that a program can use at runtime to determine where a section is linked. These symbols are external, so they appear in the link map. They can be accessed in any assembly language module if they are declared with a .global directive.
Page 273: Creating And Filling Holes
Creating and Filling Holes 7.15 Creating and Filling Holes The linker provides you with the ability to create areas within output sections that have nothing linked into them. These areas are called holes. In special cases, uninitialized sections can also be treated as holes. The following text describes how the linker handles such holes and how you can fill holes (and uninitialized sections) with a value.
Page 274 Creating and Filling Holes The following example uses assignment statements to create holes in output sections: SECTIONS outsect: file1.obj(.text) . += 100h; /* Create a hole with size 100h word s */ file2.obj(.text) . = align(16); /* Create a hole to align the SPC */ file3.obj(.text) The output section outsect is built as follows: The .text section from file1.obj is linked in.
Page 275: Filling Holes
Creating and Filling Holes Another way to create a hole in an output section is to combine an uninitialized section with an initialized section to form a single output section. In this case, the linker treats the uninitialized section as a hole and supplies data for it. The following example illustrates this method: SECTIONS outsect:...
Page 303: Hex Conversion Utility Description
Invoking the Hex Conversion Utility 10.2 Invoking the Hex Conversion Utility There are two basic methods for invoking the hex conversion utility: Specify the options and filenames on the command line. The following example converts the file firmware.out into TI-Tagged format, producing two output files, firm.lsb and firm.msb.
Page 304: Options
Invoking the Hex Conversion Utility Table 10–1. Options (a) General options The general options control the overall operation of the hex conversion utility. Option Description Page –byte Number bytes sequentially 10-36 –map filename Generate a map file 10-21 –o filename Specify an output filename 10-24 Run quietly (when used, it must appear before...
Page 305 Invoking the Hex Conversion Utility (d) Output formats The output formats specify the format of the output file. Option Description Page –a Select ASCII-Hex 10-39 –i Select Intel 10-40 –m1 Select Motorola–S1 10-41 –m2 or –m Select Motorola–S2 (default) 10-41 –m3 Select Motorola–S3 10-41...
Page 306 Invoking the Hex Conversion Utility (f) Boot-loader options for the ’C54xLP devices only The boot-loader options for ’C54x LP devices control how the hex conversion utility builds the boot table. Option Description Page –bootorg WARM Specify the source of the boot loader table as the 10-29 or –warm table currently in memory...
Page 307: Command File
Command File 10.3 Command File A command file is useful if you plan to invoke the utility more than once with the same input files and options. It is also useful if you want to use the ROMS and SECTIONS hex conversion utility directives to customize the conversion process.
Page 308: Examples Of Command Files
Command File 10.3.1 Examples of Command Files Assume that a command file named firmware.cmd contains these lines: firmware.out /* input file –t /* TI–Tagged –o firm.lsb /* output file */ –o firm.msb /* output file */ You can invoke the hex conversion utility by entering: hex500 firmware.cmd This example converts a file called appl.out into four hex files in Intel format.
Page 309: Hex Conversion Utility Process Flow
Understanding Memory Widths 10.4 Understanding Memory Widths The hex conversion utility makes your memory architecture more flexible by allowing you to specify memory and ROM widths. In order to use the hex conversion utility, you must understand how the utility treats word widths . Four widths are important in the conversion process: target width, data width, memory width, and ROM width.
Page 310: Target Width
Data width is the logical width (in bits) of the data words stored in a particular section of a COFF file. Usually, the logical data width is the same as the target width. The data width is fixed at 16 bits for the TMS320C54x and cannot be changed.
Page 311: Data And Memory Widths
Understanding Memory Widths Figure 10–3 demonstrates how the memory width is related to the data width. Figure 10–3. Data and Memory Widths Source file .word 0AABBh .word 01122h . . . Data width = 16 (fixed) Data after 0AABBh phase I 01122h of hex500 .
Page 312 Understanding Memory Widths The default ROM width that the hex conversion utility uses depends on the out- put format: All hex formats except TI-Tagged are configured as lists of 8-bit bytes; the default ROM width for these formats is 8 bits. TI-Tagged is a 16-bit format;...
Page 313: Data, Memory, And Rom Widths
Understanding Memory Widths Figure 10–4. Data, Memory, and ROM Widths Source file .word 0AABBCDDh .word 01122344h . . . Data width = 16 (fixed) Data after 0AABBh phase I 01122h of hex500 . . . Memory widths (variable) –memwidth 16 –memwidth 8 AABB Data after...
Page 314: C54X Memory Configuration Example
Understanding Memory Widths 10.4.5 A Memory Configuration Example Figure 10–5 shows a typical memory configuration example. This memory system consists of two 128K 8-bit ROM devices. Figure 10–5. ’C54x Memory Configuration Example Data width = 16 bits Lower 8 bits (data) AABBh Upper 8 bits (data) 128K x 8...
Page 315: Varying The Word Order
Understanding Memory Widths Note: When the –order Option Applies This option applies only when you use a memory width with a value less than 16. Otherwise, –order is ignored. This option does not affect the way memory words are split into output files.
Page 316: The Roms Directive
Each file can be used to program one single ROM device. The ROMS directive is similar to the MEMORY directive of the TMS320C54x linker: both define the memory map of the target address space. Each line entry in the ROMS directive defines a specific address range.
Page 317 The ROMS Directive origin specifies the starting address of a memory range. It can be entered as origin, org, or o. The associated value must be a decimal, octal, or hexadecimal constant. If you omit the origin value, the origin defaults to 0. The following table summarizes the notation you can use to specify a decimal, octal, or hexadecimal constant: Constant...
Page 318: When To Use The Roms Directive
The ROMS Directive files identifies the names of the output files that correspond to this range. Enclose the list of names in curly braces and order them from least significant to most significant output file. The number of file names should equal the number of output files that the range will generate.
Page 319: An Example Of The Roms Directive
The ROMS Directive 10.5.2 An Example of the ROMS Directive The ROMS directive in Example 10–1 shows how 16K words of 16-bit memory could be partitioned for four 8K 8-bit EPROMs. Example 10–1. A ROMS Directive Example infile.out –image –memwidth 16 ROMS EPROM1: org = 04000h, len = 02000h, romwidth = 8 files = { rom4000.b0, rom4000.b1 }...
Page 320: The Infile.out File From Example 10-1 Partitioned Into Four Output Files
The ROMS Directive Figure 10–7 shows how the ROMS directive partitions the infile.out file into four output files. Figure 10–7. The infile.out File From Example 10–1 Partitioned Into Four Output Files COFF File: Output Files: EPROM1 infile.out rom4000.b0 rom4000.b1 04000h 04000h (org) .text...
Page 321: Creating A Map File Of The Roms Directive
The ROMS Directive 10.5.3 Creating a Map File of the ROMS Directive The map file (specified with the –map option) is advantageous when you use the ROMS directive with multiple ranges. The map file shows each range, its parameters, names of associated output files, and a list of contents (section names and fill values) broken down by address.
Page 322: The Sections Directive
COFF file. If you don’t use a SECTIONS directive, the utility converts all initialized sections that fall within the configured memory. The TMS320C54x compiler-generated initialized sections include: .text, .const, .cinit, and .switch.
Page 323 The SECTIONS Directive SECTIONS begins the directive definition. sname identifies a section in the COFF input file. If you specify a sec- tion that doesn’t exist, the utility issues a warning and ignores the name. paddr specifies the physical ROM address at which this section should be located.
Page 324: Output Filenames
Output Filenames 10.7 Output Filenames When the hex conversion utility translates your COFF object file into a data format, it partitions the data into one or more output files. When multiple files are formed by splitting data into byte-wide or word-wide files, filenames are always assigned in order from least to most significant.
Page 325 Output Filenames 3) It assigns a default filename. If you specify no filenames or fewer names than output files, the utility assigns a default filename. A default filename consists of the base name from the COFF input file plus a 2- to 3-character extension.
Page 326: Image Mode And The –Fill Option
Image Mode and the –fill Option 10.8 Image Mode and the –fill Option This section points out the advantages of operating in image mode and describes how to produce output files with a precise, continuous image of a target memory range. 10.8.1 The –image Option With the –image option, the utility generates a memory image by completely filling all of the mapped ranges specified in the ROMS directive.
Page 327: Specifying A Fill Value
Image Mode and the –fill Option 10.8.2 Specifying a Fill Value The –fill option specifies a value for filling the holes between sections. The fill value must be specified as an integer constant following the –fill option. The width of the constant is assumed to be that of a word on the target processor. For example, for the ’C54x, specifying –fill 0FFh results in a fill pattern of 00FFh.
Page 328: Building A Table For An On-Chip Boot Loader
ROM or load it by other means. The boot loader supports loading from memory that is narrower than the nor- mal width of memory. For example, you can boot a 16-bit TMS320C54x from a single 8-bit EPROM by using the –memwidth option to configure the width of the boot table.
Page 329: Boot-Loader Options
Building a Table for an On-Chip Boot Loader 10.9.3 How to Build the Boot Table Table 10–2 summarizes the hex conversion utility options available for the boot loader. Table 10–2. Boot-Loader Options (a) Options for all ’C54x devices Option Description –boot Convert all sections into bootable form (use instead of a SECTIONS directive)
Page 330 Building a Table for an On-Chip Boot Loader 10.9.3.1 Building the Boot Table To build the boot table, follow these steps: Step 1: Link the file. Each block of the boot table data corresponds to an initialized section in the COFF file. Uninitialized sections are not con- verted by the hex conversion utility (see Section 10.6, The SECTIONS Directive , on page 10-22).
Page 331: Booting From A Device Peripheral
Building a Table for an On-Chip Boot Loader 10.9.3.2 Leaving Room for the Boot Table The complete boot table is similar to a single section containing all of the header records and data for the boot loader. The address of this “section” is the boot table origin.
Page 332: Setting The Entry Point For The Boot Table
The value must be a constant; the hex conversion utility cannot evaluate symbolic expressions like c_int00 (default entry point assigned by the TMS320C54x C compiler). When you use the –e option, the utility builds a dummy block of length 1 and data value 0 that loads at the specified address.
Page 333: Sample Command File For Booting From A 'C54X Eprom
Building a Table for an On-Chip Boot Loader You should set the –romwidth equal to the –memwidth unless you want to have multiple output files. The ’C54x can boot through either the serial or parallel interface with either 8- or 16-bit data. The format is the same for any combination: the boot table consists of a field containing the destination address, a field containing the length, and a block containing the data.
Page 334: Controlling The Rom Device Address
16 bits for the TMS320C54x devices. See subsection 10.4.2, Data Width , on page 10-10. mem_width is the memory width of the memory system. You can specify the memory width by the –memwidth option...
Page 335 Controlling the ROM Device Address the section load address and places the section in the address specified by paddr. The relationship between the hex conversion utility output file address field and the paddr parameter can be summarized as follows: † out_file_addr = paddr_val + ( load_addr –...
Page 336: Controlling The Address Increment Index
Controlling the ROM Device Address 2) The –bootorg option. The hex conversion utility places the boot table at the address specified by the –bootorg option if you select boot loading from memory. Neither –bootorg PARALLEL nor –bootorg SERIAL affect the address field. 10.10.2 Controlling the Address Increment Index By default, the hex conversion utility increments the output file address field according to the memory width value.
Page 337: Hex Command File For Avoiding A Hole At The Beginning Of A Section
Controlling the ROM Device Address 10.10.4 Dealing With Address Holes When memory width is different from data width, the automatic multiplication of the load address by the correction factor might create holes at the beginning of a section or between sections. For example, assume you want to load a COFF section (.sec1) at address 0x0100 of an 8-bit EPROM.
Page 338: Options For Specifying Hex Conversion Formats
Description of the Object Formats 10.11 Description of the Object Formats The hex conversion utility converts a COFF object file into one of five object formats that most EPROM programmers accept as input: ASCII-Hex, Intel MCS-86, Motorola-S, Extended Tektronix, or TI-Tagged. Table 10–3 specifies the format options.
Page 339: Ascii-Hex Object Format
Description of the Object Formats 10.11.1 ASCII-Hex Object Format (–a Option) The ASCII-Hex object format supports 16-bit addresses. The format consists of a byte stream with bytes separated by spaces. Figure 10–10 illustrates the ASCII-Hex format. Figure 10–10. ASCII-Hex Object Format Nonprintable Nonprintable end code...
Page 340: Intel Hex Object Format
Description of the Object Formats 10.11.2 Intel MCS-86 Object Format (–i Option) The Intel object format supports 16-bit addresses and 32-bit extended addresses. Intel format consists of a 9-character (4-field) prefix— which defines the start of record, byte count, load address, and record type —the data, and a 2-character checksum suffix.
Page 341: Motorola-S Format
Description of the Object Formats 10.11.3 Motorola Exorciser Object Format (–m1, –m2, –m3 Options) The Motorola S1, S2, and S3 formats support 16-bit, 24–bit, and 32–bit addresses, respectively. The formats consist of a start-of-file (header) record, data records, and an end-of-file (termination) record. Each record is made up of five fields: record type, byte count, address, data, and checksum.
Page 342: Ti-Tagged Object Format
Description of the Object Formats 10.11.4 Texas Instruments SDSMAC Object Format (–t Option) The TI-Tagged object format supports 16-bit addresses. It consists of a start- of-file record, data records, and end-of-file record. Each of the data records is made up of a series of small fields and is signified by a tag character. The sig-...
Page 343: Extended Tektronix Object Format
Description of the Object Formats 10.11.5 Extended Tektronix Object Format (–x Option) The Tektronix object format supports 32-bit addresses and has two types of records: data record contains the header field, the load address, and the object code. termination record signifies the end of a module. The header field in the data record contains the following information: Number of ASCII...
Page 344: Hex Conversion Utility Error Messages
Action Correct the section or boot-loader address. Refer to the TMS320C54x DSP Reference Set for valid memory locations. sections overlapping Description Two or more COFF section load addresses overlap or a boot table address overlaps another section.
Page 345: Mnemonic-To-Algebraic Translator Description
Chapter 11 Mnemonic-to-Algebraic Translator Description The TMS320C54x mnemonic-to-algebraic translator utility converts assembly code written in the mnemonic instruction set to code written in the algebraic instruction set. Topic Page 11.1 Translator Overview ......... .
Page 346: Translator Overview
Translator Overview 11.1 Translator Overview TMS320C54x mnemonic-to-algebraic translator utility converts mnemonic assembly instructions into algebraic assembly instructions. Mnemonic instructions usually consist of a keyword and operands. Algebraic instructions usually consist of operands and operators. Algebraic instructions resemble higher-level programming language instructions.
Page 347: Translator Development Flow
Translator Development Flow 11.2 Translator Development Flow Figure 6–1 shows the translator’s role in the assembly language development process. The assembler accepts mnemonic or algebraic syntax. Figure 11–1.Translator Development Flow source files Macro source files C compiler Mnemonic-to- Archiver Assembler algebraic source translator...
Page 348: Invoking The Translator
Invoking the Translator 11.3 Invoking the Translator To invoke the translator, enter: mnem2alg [ option ] inputfile mnem2alg is the command that invokes the translator. option specifies the translator mode (see Section 11.4, Translation Modes , on page 11-5). The options are: –t Literal mode, which is the default if no option is specified –e...
Page 349: Literal Mode Process
Translation Modes 11.4 Translation Modes The translator runs in one of the following modes: Literal Keeps the original mnemonic instruction, commented out, fol- lowed by the translated instruction Expansion Expands and preprocesses macro invocations and replaces substitution symbols 11.4.1 Literal Mode (–t Option) When running in the default literal mode (–t option), the translator translates instructions without any preprocessing.
Page 350: Expansion Mode Process
Translation Modes 11.4.3 Expansion Mode (–e Option) Expansion mode is invoked using the –e option. In expansion mode, the translator preprocesses macros and substitution symbols and then translates instructions. The translator invokes the assembler with a switch that prepro- cesses the input to expand macros and insert substitution symbols. The assembler creates a file with an exp extension.
Page 351: Expansion Mode
Translation Modes Example 11–2. Expansion Mode (a) Source code file.asm ******************************** .asg *AR0,sym mymac .macro parm1,parm2 parm1,parm2 sym,5,parm2,B .endm mymac sym,A ******************************** (b) Intermediate code file.exp – after preprocessing before translation ********************************* .asg *AR0,sym mymac .macro parm1,parm2 parm1,parm2 sym,5,parm2,B .endm mymac sym,A *AR0,A...
Page 352: How The Translator Works With Macros
How the Translator Works With Macros 11.5 How the Translator Works With Macros This section describes how the translator works with macros. The following subjects are discussed: Directives in macros Macro local variables Defining labels when invoking a macro 11.5.1 Directives in Macros When macro invocations are expanded, directives in macro definitions are not copied to the intermediate file.
Page 353: Macro Local Variables
How the Translator Works With Macros 11.5.2 Macro Local Variables When macro local variables are encountered, they are changed so that repeated calls to the macro do not generate identical labels. The following source code preprocesses to the intermediate code as shown: Example 11–4.
Page 354: Defining Labels
How the Translator Works With Macros 11.5.3 Defining Labels When Invoking A Macro If there is a label associated with a macro invocation, that label is not used after expansion and translation. This is because the label is commented out with the macro invocation.
Page 355 Running Title—Attribute Reference Appendix A Appendix A Common Object File Format The compiler, assembler, and linker create object files in common object file format (COFF). COFF is an implementation of an object file format of the same name that was developed by AT&T for use on UNIX-based systems. This for- mat is used because it encourages modular programming and provides more powerful and flexible methods for managing code segments and target system memory.
Page 356: Coff File Structure
COFF File Structure A.1 COFF File Structure The elements of a COFF object file describe the file’s sections and symbolic debugging information. These elements are: A file header Optional header information A table of section headers Raw data for each initialized section Relocation information for each initialized section Line-number entries for each initialized section A symbol table...
Page 357: Coff Object File
COFF File Structure A.1.2 Typical Object File Structure Figure A–2 shows a typical example of a COFF object file that contains the three default sections, .text, .data, and .bss, and a named section (referred to as <named>). By default, the tools place sections into the object file in the following order: .text, .data, initialized named sections, .bss, and uninitialized named sections.
Page 358: A.1.3 Impact Of Switching Operating Systems
COFF File Structure A.1.3 Impact of Switching Operating Systems The ’C54x COFF files are recognized by all operating system versions of the development tools. When you switch from one operating system to another, only the file header information in the COFF files needs to be byte swapped. The raw data in the COFF files does not need any changes.
Page 359: File Header Contents
Unsigned short integer Target id; magic number indicates the file can be executed in a TMS320C54x system Table A–2 lists the flags that can appear in bytes 18 and 19 of the file header. Any number and combination of these flags can be set at the same time (for example, if bytes 18 and 19 are set to 0003h, F_RELFLG and F_EXEC are both set.)
Page 360: Optional File Header Contents
Optional File Header Format A.3 Optional File Header Format The linker creates the optional file header and uses it to perform relocation at download time. Partially linked files do not contain optional file headers. Table A–3 illustrates the optional file header format. Table A–3.
Page 361: Section Header Contents For Coff1 Files
Section Header Structure A.4 Section Header Structure COFF object files contain a table of section headers that define where each section begins in the object file. Each section has its own section header. The COFF1 and COFF2 file types contain different section header information. Table A–4 shows the section header contents for COFF1 files.
Page 362: Section Header Flags
Section Header Structure Table A–6 lists the flags that can appear in the section header. The flags can be combined. For example, if the flag’s word is set to 024h, both STYP_GROUP and STYP_TEXT are set. Table A–6. Section Header Flags Mnemonic Flag Description...
Page 363: Section Header Pointers For The .Text Section
Section Header Structure Figure A–3 illustrates how the pointers in a section header would point to the elements in an object file that are associated with the .text section. Figure A–3. Section Header Pointers for the .text Section 0–7 8–11 12–15 16–19 20–23 24–27 28–31 32–33 34–35 36–37 38 .text...
Page 364: Relocation Entry Contents
Structuring Relocation Information A.5 Structuring Relocation Information A COFF object file has one relocation entry for each relocatable reference. The assembler automatically generates relocation entries. The linker reads the relocation entries as it reads each input section and performs relocation. The relocation entries determine how references within each input section are treated.
Page 365: Relocation Types (Bytes 8 And 9
Structuring Relocation Information If the symbol table index in a relocation entry is –1 (0FFFFh), this is called an internal relocation. In this case, the relocation amount is simply the amount by which the current section is being relocated. The relocation type specifies the size of the field to be patched and describes how to calculate the patched value.
Page 366: Line-Number Blocks
Line-Number Table Structure A.6 Line-Number Table Structure The object file contains a table of line-number entries that are useful for symbolic debugging. When the C compiler produces several lines of assembly language code, it creates a line-number entry that maps these lines back to the original line of C source code that generated them.
Page 367: Line-Number Entries
Line-Number Table Structure For the remaining lines in a function, bytes 0 –3 show the physical address (the number of words created by a line of C source) and bytes 4 –5 show the address of the original C source, relative to its appearance in the C source program.
Page 368: Symbol Table Contents
Symbol Table Structure and Content A.7 Symbol Table Structure and Content The order of symbols in the symbol table is very important; they appear in the sequence shown in Figure A–6. Figure A–6. Symbol Table Contents filename 1 function 1 local symbols for function 1 function 2...
Page 369: Symbol Table Entry Contents
Symbol Table Structure and Content The entry for each symbol in the symbol table contains the symbol’s: Name (or a pointer into the string table) Type Value Section it was defined in Storage class Basic type (integer, character, etc.) Derived type (array, structure, etc.) Dimensions Line number of the source code that defined the symbol Section names are also defined in the symbol table.
Page 370: Special Symbols In The Symbol Table
Symbol Table Structure and Content A.7.1 Special Symbols The symbol table contains some special symbols that are generated by the compiler, assembler, and linker. Each special symbol contains ordinary symbol table information as well as an auxiliary entry. Table A–11 lists these symbols.
Page 371: Symbols For Blocks
Symbol Table Structure and Content A.7.1.1 Symbols and Blocks In C, a block is a compound statement that begins and ends with braces. A block always contains symbols. The symbol definitions for any particular block are grouped together in the symbol table and are delineated by the .bb/.eb special symbols.
Page 372: String Table
Symbol Table Structure and Content A.7.2 Symbol Name Format The first eight bytes of a symbol table entry (bytes 0–7) indicate a symbol’s name: If the symbol name is eight characters or less, this field has type character. The name is padded with nulls (if necessary) and stored in bytes 0–7. If the symbol name is greater than 8 characters, this field is treated as two long integers.
Page 373: Symbol Storage Classes
Symbol Table Structure and Content A.7.4 Storage Classes Byte 16 of the symbol table entry indicates the storage class of the symbol. Storage classes refer to the method in which the C compiler accesses a symbol. Table A–12 lists valid storage classes. Table A–12.
Page 374: Special Symbols And Their Storage Classes
Symbol Table Structure and Content Table A–13. Special Symbols and Their Storage Classes Special Restricted to This Special Restricted to This Symbol Storage Class Symbol Storage Class .file C_FILE .eos C_EOS C_BLOCK .text C_STAT C_BLOCK .data C_STAT C_FCN .bss C_STAT C_FCN A.7.5 Symbol Values Bytes 8–11 of a symbol table entry indicate a symbol’s value.
Page 375: Section Numbers
Symbol Table Structure and Content A.7.6 Section Number Bytes 12–13 of a symbol table entry contain a number that indicates which section the symbol was defined in. Table A–15 lists these numbers and the sections they indicate. Table A–15. Section Numbers Section Mnemonic Description...
Page 376: Basic Types
Symbol Table Structure and Content Table A–16. Basic Types Mnemonic Value Type T_NULL Type not assigned T_CHAR Character T_SHORT Short integer T_INT Integer T_LONG Long integer T_FLOAT Floating point T_DOUBLE Double word T_STRUCT Structure T_UNION Union T_ENUM Enumeration T_MOE Member of an enumeration T_UCHAR Unsigned character T_USHORT...
Page 377: Auxiliary Symbol Table Entries Format
Symbol Table Structure and Content A.7.8 Auxiliary Entries Each symbol table entry may have one or no auxiliary entry. An auxiliary sym- bol table entry contains the same number of bytes as a symbol table entry (18), but the format of an auxiliary entry depends on the symbol’s type and storage class.
Page 378: Filename Format For Auxiliary Table Entries
Symbol Table Structure and Content A.7.8.1 Filenames Each of the auxiliary table entries for a filename contains a 14-character file- name in bytes 0–13. Bytes 14–17 are unused. Table A–19. Filename Format for Auxiliary Table Entries Byte Type Description Number 0–13 Character File name...
Page 379: End-Of-Structure Format For Auxiliary Table Entries
Symbol Table Structure and Content A.7.8.4 End of Structure Table A–22 illustrates the format of auxiliary table entries for ends of structures. Table A–22. End-of-Structure Format for Auxiliary Table Entries Byte Type Description Number 0–3 Long integer Tag index 4–5 —...
Page 380: Array Format For Auxiliary Table Entries
Symbol Table Structure and Content A.7.8.6 Arrays Table A–24 illustrates the format of auxiliary table entries for arrays. Table A–24. Array Format for Auxiliary Table Entries Byte Type Description Number 0–3 Long integer Tag index 4–5 Unsigned short integer line-number declaration 6–7 Unsigned short integer Size of array...
Page 381: Beginning-Of-Blocks/Functions Format For Auxiliary Table Entries
Symbol Table Structure and Content A.7.8.8 Beginning of Blocks and Functions Table A–26 illustrates the format of auxiliary table entries for the beginnings of blocks and functions. Table A–26. Beginning-of-Blocks/Functions Format for Auxiliary Table Entries Byte Type Description Number 0–3 —...
Page 382 Appendix B Appendix A Symbolic Debugging Directives The TMS320C54x assembler supports several directives that the TMS320C54x C compiler uses for symbolic debugging: The .sym directive defines a global variable, a local variable, or a function. Several parameters allow you to associate various debugging information with the symbol or function.
Page 383 .block/.endblock Define a Block Syntax .block beginning line number .endblock ending line number Description The .block and .endblock directives specify the beginning and end of a C block. The line numbers are optional; they specify the location in the source file where the block is defined.
Page 384 .file Supply a File Identifier Syntax .file ” filename ” Description The .file directive allows a debugger to map locations in memory back to lines in a C source file. The filename is the name of the file that contains the original C source program.
Page 385 .func/.endfunc Define a Function Syntax .func beginning line number .endfunc ending line number Description The .func and .endfunc directives specify the beginning and end of a C func- tion. The line numbers are optional; they specify the location in the source file where the function is defined.
Page 386 .func/.endfunc Define a Function Resulting assembly language code: .global _power .sym _power,_power,36,2,0 .func ;*************************************************************** ;* FUNCTION DEF: _power ;*************************************************************** 15 000000 _power: 16 000000 eefd FRAME #–3 17 000001 f495 ;* A assigned to _x .sym _x,0,4,17,16 .sym _n,4,4,9,16 .sym _x,0,4,1,16 .sym _i,1,4,1,16...
Page 387 .line Create a Line Number Entry Syntax .line line number [, address ] Description The .line directive creates a line number entry in the object file. Line number entries are used in symbolic debugging to associate addresses in the object code with the lines in the source code that generated them.
Page 388 .member Define a Member Syntax .member name, value [, type, storage class, size, tag, dims] Description The .member directive defines a member of a structure, union, or enumera- tion. It is valid only when it appears in a structure, union, or enumeration defini- tion.
Page 389 .stag/.etag/.utag/.eos Define a Structure Syntax .stag name [, size ] member definitions .eos .etag name [, size ] member definitions .eos .utag name [, size ] member definitions .eos Description The .stag directive begins a structure definition. The .etag directive begins an enumeration definition.
Page 390 .stag/.etag/.utag/.eos Define a Structure Example 2 Following is an example of a union definition. C source: union u_tag { val1; float val2; char valc; valu; Resulting assembly language code: .utag _u_tag,32 .member _val1,0,4,11,16 .member _val2,0,6,11,32 .member _valc,0,2,11,16 .eos Example 3 Following is an example of an enumeration definition.
Page 391 .sym Define a Symbol Syntax .sym name, value [, type, storage class, size, tag, dims] Description The .sym directive specifies symbolic debug information about a global vari- able, local variable, or a function. Name is the name of the variable that is put in the object symbol table. The first 32 characters of the name are significant.
Page 392 .sym Define a Symbol Resulting assembly language code: .global _array .bss _array,50,0,0 .sym _array,_array,244,2,800,,5,10 .global _ptr .bss _ptr,1,0,0 .sym _ptr,_ptr,21,2,16 .global _str .bss _str,2,0,0 .sym _str,_str,8,2,32,_s .global _ext .bss _ext,1,0,0 .sym _ext,_ext,4,2,16 Symbolic Debugging Directives B-11...
Page 393 Running Title—Attribute Reference Appendix C Appendix A Hex Conversion Utility Examples The flexible hex conversion utility offers many options and capabilities. Once you understand the proper ways to configure the EPROM system and the requirements of the EPROM programmer, you will find that converting a file for a specific application is easy.
Page 394: C.1 Base Code For The Examples
Base Code for the Examples C.1 Base Code for the Examples The three major examples in this appendix show how to develop a hex com- mand file for multiple EPROM memory systems, avoid holes, and generate a boot table. The first two examples use the assembly code shown in Example C–1.
Page 395: A Two 8-Bit Eprom System
Example 1: Building a Command File for Two 8-Bit EPROMS C.2 Example 1: Building A Hex Command File for Two 8-Bit EPROMs Example 1 shows how to build the hex command file you need for converting a COFF object file for the memory system shown in Figure C–1. In this system, there are two external 64K 8-bit EPROMs interfacing with a ’C54x target processor.
Page 396: C–2 A Linker Command File For Two 8-Bit Eproms
Example 1: Building a Command File for Two 8-Bit EPROMS To work around this problem, you can combine the sections at link stage, creat- ing a single section for conversion. To do this, use the linker command shown in Example C–2. Example C–2.
Page 397: C–3 A Hex Command File For Two 8-Bit Eproms
Example 1: Building a Command File for Two 8-Bit EPROMS With the memory width and ROM width values above, the utility will automati- cally generate two output files. The ratio of memory width to ROM width deter- mines the number of output files. The ROM0 file contains the lower 8 of the 16 bits of raw data, and the ROM1 file contains the upper 8 bits of the correspond- ing data.
Page 398: Data From Output File
Example 1: Building a Command File for Two 8-Bit EPROMS Figure C–2. Data From Output File (a) low8.bit (Lower Bits) Data from converted output file :040010003478BBDDA8 :00000001FF Corresponding map in EPROM — ROM0 (See Example C–1 on page C-2) 0x0010 (b) upp8.bit (Upper Bits) Data from converted output file :040010001256AACC0E...
Page 399: C–4 Map File Resulting From Hex Command File In Example C–3 On Page C-5
Although not required, the –map option generates useful information about the output. The resulting map is shown in Example C–4. Example C–4. Map File Resulting From Hex Command File in Example C–3 on page C-5 ****************************************************** TMS320C54x COFF/Hex Converter Version x.xx ****************************************************** Fri Oct 11 15:10:53 1998 INPUT FILE NAME: <test.out>...
Page 400: C.3 Example 2: Avoiding Holes With Multiple Sections
Example 2: Avoiding Holes With Multiple Sections C.3 Example 2: Avoiding Holes With Multiple Sections When the memory width is less than the data width, holes may appear at the beginning of a section or between sections. This is due to multiplication of the load address by a correction factor.
Page 401: C–6 Method Two For Avoiding Holes
Example 2: Avoiding Holes With Multiple Sections (b) Hex command file –i test.out –map example.mxp ROMS PAGE 0: ROM: org = 0x0000, length = 0x800, romwidth = 8, memwidth = 8 SECTIONS sec1: paddr = 0x0000 sec2: paddr = 0x0004 Example C–6.
Page 402: Eprom System For A 'C54X
Example 3: Generating a Boot Table C.4 Example 3: Generating a Boot Table Example 3 shows how to use the linker and the hex conversion utility to build a boot load table for the ’C54x devices. The code used in this section is shown in Example C–7.
Page 403 Example 3: Generating a Boot Table The on-chip boot loader loads only a single block. This may present a problem when you are loading C code compiled with the TMS320C54x C compiler. The TMS320C54x C compiler creates several sections or blocks when it compiles C source code.
Page 404: C–8 Linker Command File To Form A Single Boot Section
Example 3: Generating a Boot Table Example C–8. Linker Command File to Form a Single Boot Section –c –l rts.lib –m boot1.map –o boot.out MEMORY PAGE 0 : PROG : origin = 001400h, length = 01000h PAGE 1 : DATA : origin = 0080h, length = 01000h SECTIONS...
Page 405: C–9 Section Allocation Portion Of Map File Resulting From The Command File
Example 3: Generating a Boot Table Example C–9. Section Allocation Portion of Map File Resulting From the Command File SECTION ALLOCATION MAP output attributes/ section page origin length input sections –––––––– –––– –––––––––– –––––––––– –––––––––––––––– boot_sec 00001400 0000006e 00001400 00000004 boot.obj (.text) 00001404 0000002b...
Page 406 Example 3: Generating a Boot Table Notice that the linker placed a hole at the end of the section boot_sec with a fill value of 0, as specified in the command file. Also, the global symbol cinit coincides with the start of the first .cinit section included in the link. When the linker is executed with the command file in Example C–8 on page C-12, the linker issues warnings that the output file contains no .text section and that the global symbol cinit is being redefined.
Page 407: C–10 Hex Command File For Converting A Coff File
Example 3: Generating a Boot Table Example C–10. Hex Command File for Converting a COFF File boot.out /* Input COFF file –i /* Select Intel format –map boot2.map –o boot.hex /* Name the hex output file –memwidth 8 /* Set EPROM system memory width */ –romwidth 8 /* Set physical ROM width –boot...
Page 408: C–11 Map File Resulting From The Command File In Example C–10
Example 3: Generating a Boot Table Example C–11. Map File Resulting From the Command File in Example C–10 ****************************************************** TMS320C54x COFF/Hex Converter Version x.xx ****************************************************** Fri Oct 11 15:27:46 1998 INPUT FILE NAME: <boot.out> OUTPUT FORMAT: Intel PHYSICAL MEMORY PARAMETERS...
Page 409: Eprom System For A 'C54Xlp
Example 4: Generating a Boot Table for LP Core Devices C.5 Example 4: Generating a Boot Table for LP Core Devices Example 4 shows how to use the linker and the hex conversion utility to build a boot load table for the ’C54xLP devices. For the ’C54xLP devices, you can specify multiple sections.
Page 410 (sections that contain data or code) and uninitialized sections (sections that reserve space but contain no actual data). Initialized sections created by the TMS320C54x C compiler include .text, .cinit, .const, and .data. Uninitialized sections are ignored by the hex conversion utility and are not converted.
Page 411: C–14 Linker Command File For A 'C54Xlp
Example 4: Generating a Boot Table for LP Core Devices Example C–14. Linker Command File for a ’C54xLP –c c54xlp.obj –l rts.lib –m c54xlp.map –o c54xlp.out MEMORY PAGE 0 : PROG : origin = 001400h, length = 01000h PAGE 1 : DATA : origin = 0080h, length = 01000h SECTIONS...
Page 412 Example 4: Generating a Boot Table for LP Core Devices Example C–15. Section Allocation Portion of Map File Resulting From the Command File in Example C–14 (Continued) SECTION ALLOCATION MAP output attributes/ section page origin length input sections –––––––– –––– ––––––––––...
Page 413 Example 4: Generating a Boot Table for LP Core Devices The hex conversion utility has options that describe the requirements for the EPROM programmer and options that describe the EPROM memory system. For Example 4, assume that the EPROM programmer has only one require- ment: that the hex file be in Intel format.
Page 414: C–16 Hex Command File For Converting A Coff File
Example 4: Generating a Boot Table for LP Core Devices Example C–16. Hex Command File for Converting a COFF File c54xlp.out /* Input COFF file –i /* Select Intel format –map c54xlp.mxp /* Name hex utility map file –o c54xlp.hex /* Name the hex output file –memwidth 8 /* Set EPROM system memory width...
Page 415: C–17 Map File Resulting From The Command File In Example C–16
Example 4: Generating a Boot Table for LP Core Devices Example C–17. Map File Resulting From the Command File in Example C–16 ****************************************************** TMS320C54x COFF/Hex Converter Version x.xx ****************************************************** Sat Sep 21 17:01:13 1998 INPUT FILE NAME: <c54xlp.out> OUTPUT FORMAT:...
Page 416 Appendix D Appendix A Error Messages This appendix lists the assembler and linker error messages in numeric and alphabetical order. Some messages have error-type numbers associated with them. These messages are listed first. If an error-type has multiple messages, the messages are in alphabetical order. The messages without numbers are listed in alphabetical order.
Page 417 Error Messages E0000 Attempt to nest repeat block Cluttered DIE symbol operand Comma required to separate arguments Comma required to separate parameters Illegal combination of shift operands Illegal data block contents Illegal identifier after keyword unsigned Illegal instruction Illegal keyword Illegal repeat block open –...
Page 418 Error Messages E0001 Section sym is not an initialized section Section sym is not defined Description These are errors about invalid symbol names. A symbol is invalid for the context in which it is used. Action Correct the source per the error message text. E0002 Invalid directive specification Invalid mnemonic specification...
Page 419 Error Messages Illegal auxiliary register specified Illegal condition operand Illegal condition operand or combination Illegal indirect memaddr specification Illegal operand Illegal smem operand Immediate value out of range Incorrect bit symbol for specified status register Invalid binary constant specified Invalid constant specification Invalid decimal constant specified Invalid float constant specified Invalid hex constant specified...
Page 420 Error Messages E0004 Absolute, well-defined integer value expected Accumulator specified in second half of parallel instruction may not be the same as the first Data size must be equal to pointer size Expecting accumulator A or B Expecting ASM or shift value Expecting dual memory addressing Identifier expected Identifier operand expected...
Page 421 Error Messages Substitution symbol operand expected The accumulator operands must be different The operands must be SP Description These errors are about illegal operands. The instruction, parameter or other operand specified was not legal for this syntax. Action Correct the source per the error message text. E0005 Missing field value operand Missing operand(s)
Page 422 Error Messages E0007 Conditional nesting is too deep Loop count out of range Description These are errors about conditional assembly loops. Condi- tional block nesting cannot exceed 32 levels. Action Correct the .macro/.endmacro, .if/.elseif/.else/.endif or .loop/ .break/.endloop source. E0008 Bad use of .access directive Matching .struct directive is not present Matching .union directive is not present Description...
Page 423 Error Messages E0100 Label missing Label required .setsym requires a label Description These are errors about required labels. The given directive requires a label, but none is specified. Action Correct the source by specifying the required label. E0101 Labels are not allowed with this directive Standalone labels not permitted in structure/union defs Description These are errors about invalid labels.
Page 424 Error Messages Cannot resolve symbol in expression Difference between segment symbols not permitted Expression evaluation failed Expression must be absolute integer value Illegal divide by zero Illegal remainder by zero Integer divide by zero Integer remainder by zero Offset expression must be integer value Operation cannot be performed on given operands Unable to compose expression Unary operator can’t be applied...
Page 425 Error Messages E0300 Cannot equate an external symbol to an external Cannot redefine this section name Cannot tag an undefined symbol Empty structure or union definition Illegal structure or union tag Missing closing ’}’ for repeat block Redefinition of ”sym” attempted Structure member previously defined Structure tag can’t be global Symbol can’t be defined in terms of itself...
Page 426 Error Messages E0400 Symbol table entry is not balanced Description A symbolic debugging directive does not have a complement- ing directive (i.e., a .block without an .endblock). Action Check the source for mismatched conditional assembly directives. E0500 Macro argument string is too long Missing macro name Too many variables declared in macro Description...
Page 427 Error Messages E0600 Bad archive entry for macro name Bad archive name Can’t read a line from archive entry library name macro library not found library name is not in archive format Description These are errors about macro library accessing. A problem was encountered reading from or writing to a macro library archive file.
Page 428 Error Messages E0801 Instructions not permitted in structure/union definitions Description An invalid instruction was encountered in a structure or union definition. Action Correct the source by removing the invalid instruction(s). E0802 Expecting parallel instruction Incorrect instruction used in parallel Illegal 2nd instruction used in parallel Illegal form of LD used in parallel Illegal form of ST used in parallel Description...
Page 429 Error Messages E1000 Include/Copy file not found or opened Description The specified filename cannot be found. Action Check spelling, pathname, environment variables, etc. E1300 Copy limit has been reached Exceeded limit for macro arguments Macro nesting limit exceeded Description These errors are about general assembler limits that have been exceeded.
Page 430 Error Messages Immediate value out of range Line too long, will be truncated Location operand truncated Power of 2 required, next larger power of 2 assumed Section Name is limited to 8 characters Shift value out of range Specified value out of range Status bit value out of range String is too long –...
Page 431 Error Messages absolute symbol (...) being redefined Description An absolute symbol cannot be redefined. Action Check the syntax of all expressions, and check the input di- rectives for accuracy. adding name (...) to multiple output sections Description The input section is mentioned twice in the SECTIONS direc- tive.
Page 432 Error Messages binding address (...) for section (...) overlays (...) at (...) Description Two sections overlap and cannot be allocated. Action If you are using a linker command file, check that MEMORY and SECTIONS directives allow enough room to ensure that no sections are being placed in unconfigured memory.
Page 433 Error Messages cannot resize (...), section has initialized definition in (...) Description An initialized input section named .stack or .heap exists, pre- venting the linker from resizing the section. cannot specify a page for a section within a GROUP Description A section was specified to a specific page within a group.
Page 434 Error Messages can’t create map file (...) Description Usually indicates an illegal filename. Action Check spelling, pathname, environment variables, etc. The filename must conform to operating system conventions. can’t find input file filename Description The file, filename , is not in your PATH, is misspelled, etc. Action Check spelling, pathname, environment variables, etc.
Page 435 Error Messages –e flag does not specify a legal symbol name (...) Description The –e option is not supplied with a valid symbol name as an operand. entry point other than _c_int00 specified Description For –c or –cr option only. A program entry point other than the value of _c_int00 was supplied.
Page 436 Error Messages fail to skip (...) Description The file may be corrupt. Action If the input file is corrupt, try reassembling it. fail to write (...) Description The disk may be full or protected. Action Check disk volume and protection. file (...) has no relocation information Description You have attempted to relink a file that was not linked with –r.
Page 437 Error Messages illegal operator in expression Description Review legal expression operators. illegal option within SECTIONS Description The –l (lowercase L) option is the only option allowed within a SECTIONS directive. illegal relocation type (...) found in section(s) of file (...) Description The binary file is corrupt.
Page 438 Error Messages length redefined for memory area (...) Description A memory area in a MEMORY directive has more than one length. library (...) member (...) has no relocation information Description The library member has no relocation information. It is possible for a library member to not have relocation informa- tion;...
Page 439 Error Messages memory area for (...) redefined Description More than one named memory allocation is supplied for an output section. memory page for (...) redefined Description More than one page allocation is supplied for a section. memory attributes redefined for (...) Description More than one set of memory attributes is supplied for an out- put section.
Page 440 Error Messages no allocation allowed with a GROUP–allocation for section (...) ignored Description A section in a group was specified for individual allocation. The entire group is treated as one unit, so the group may be aligned or bound to an address, but the sections making up the group cannot be handled individually.
Page 441 Error Messages –o flag does not specify a valid file name : string Description The filename must follow the operating system file naming conventions. origin missing for memory area (...) Description An origin is not specified with the MEMORY directive. An origin specifies the starting address of a memory range.
Page 442 Error Messages PC-relative displacement overflow at address (...) in file (...) Description The relocation of a PC-relative jump resulted in a jump dis- placement too large to encode in the instruction. –r incompatible with –s (–s ignored) Description Both the –r option and the –s option were used. Since the –s option strips the relocation information and –r requests a relo- catable object file, these options are in conflict with each oth- relocation entries out of order in section (...) of file (...)
Page 443 Error Messages section (...) not built Description Most likely there is a syntax error in the SECTIONS directive. section (...) not found Description An input section specified in a SECTIONS directive was not found in the input file. section (...) won’t fit into configured memory Description A section can’t be allocated, because no configured memory area exists that is large enough to hold it.
Page 444 Error Messages too many arguments – use a command file Description You used more than ten arguments on a command line or in response to prompts. too many –i options, 7 allowed Action More than seven –i options were used. Additional search di- rectories can be specified with a C_DIR or A_DIR environ- ment variable.
Page 445 Error Messages undefined symbol in expression Description An assignment statement contains an undefined symbol. unrecognized option (...) Action Check the list of valid options. zero or missing length for memory area (...) Description A memory range defined with the MEMORY directive did not have a nonzero length.
Page 446 Appendix A Glossary absolute address: An address that is permanently assigned to a TMS320C54x memory location. absolute lister: A debugging tool that accepts linked files as input and creates .abs files as output. These .abs files can be assembled to pro- duce a listing that shows the absolute addresses of object code.
Page 447 Glossary assignment statement: A statement that assigns a value to a variable. autoinitialization: The process of initializing global C variables (contained in the .cinit section) before beginning program execution. auxiliary entry: The extra entry that a symbol may have in the symbol table and that contains additional information about the symbol (whether it is a filename, a section name, a function name, etc.).
Page 448 A symbol that is used in the current program module but is defined in a different program module. field: For the TMS320C54x, a software-configurable data type whose length can be programmed to be any value in the range of 1–16 bits.
Page 449 TMS320C54x system memory and executed by the device. listing file: An output file, created by the assembler, that lists source state- ments, their line numbers, and their effects on the SPC. loader: A device that loads an executable module into TMS320C54x system memory.
Page 450: E Glossary
.asm. magic number: A COFF file header entry that identifies an object file as a module that can be executed by the TMS320C54x. map file: An output file, created by the linker, that shows the memory configuration, section composition, and section allocation, as well as symbols and the addresses at which they were defined.
Page 451 Glossary object library: An archive library made up of individual object files. operands: The arguments, or parameters, of an assembly language instruction, assembler directive, or macro directive. optional header: A portion of a COFF object file that the linker uses to perform relocation at download time.
Page 452 See SPC . sign extend: To fill the unused MSBs of a value with the value’s sign bit. simulator: A software development system that simulates TMS320C54x operation. source file: A file that contains C code or assembly language code that will be compiled or assembled to form an object file.
Page 453 An optional typ e name that can be assigned to a structure, union, or enumeration. target memory: Physical memory in a TMS320C54x system into which exe- cutable object code is loaded. .text: One of the default COFF sections. The .text section is an initialized section that contains executable code.
Page 454 Index –? algebraic assembler option 3-5 defined E-1 linker option 7-6 source file 3-5 translation from mnemonic 11-1 to 11-10 ; in assembly language source 3-13 .algebraic directive 4-23, 4-26 # operand prefix 3-12 .align directive 4-15, 4-27 $ symbol for SPC 3-19 compatibility with C1x/C2x/C2xx/C5x 4-7 * in assembly language source 3-13 alignment 4-15 to 4-16, 4-27...
Page 455 archiver 1-3 assembler directives 4-1 to 4-98 commands 6-4 absolute lister defined E-1 .setsect 8-8 examples 6-6 .setsym 8-8 in the development flow 6-3 aligning the section program counter (SPC), invoking 6-4 4-15 to 4-16 options 6-5 .align 4-15, 4-27 overview 6-2 .even 4-15, 4-27 compatibility with C1x/C2x/C2xx/C5x 4-7...
Page 456 assembler directives, formatting the assembly-time constants 4-79 output listing (continued) defined E-1 .ssnolist 4-18, 4-81 described 3-16 .tab 4-18, 4-87 assignment statement .title 4-18, 4-89 defined E-2 .width 4-18, 4-60 expressions 7-58 to 7-59 initializing constants 4-11 to 4-14 attr MEMORY specification 7-29 .bes 4-11, 4-80 attributes 3-35, 7-29 .byte 4-12, 4-33...
Page 457 .bss directive 4-8, 4-30 .cinit compatibility with C1x/C2x/C2xx/C5x 4-7 section 7-68 to 7-69 in sections 2-4 tables 7-68 linker definition 7-60 cinit symbol 7-68 to 7-69 .bss section 4-8, 4-30, A-3 .clink directive 4-8, 4-34 defined E-2 holes 7-63 COFF initializing 7-63 auxiliary entries A-23 to A-28 built-in functions 3-29, 5-9...
Page 458 command file (continued) cross-reference lister linker creating the cross-reference listing 9-2 constants in 7-24 example 9-4 described 7-21 to 7-24 in the development flow 9-2 examples 7-71 to 7-74 invoking 9-3 invoking 7-4 options 9-3 reserved words 7-24 symbol attributes 9-6 cross-reference listing comments assembler option 3-6...
Page 459 .double directive 4-13, 4-40 error messages displayed by tools D-1 to D-30 .drlist directive 4-17, 4-41 generating 4-24, 4-42 use in macros 5-21 hex conversion utility 10-44 .drnolist directive 4-17, 4-41 producing in macros 5-19 use in macros 5-21 .etag symbolic debugging directive B-9 DSECT section 7-56 .etext linker symbol 7-60 dummy section 7-56...
Page 460 file copy 3-5 identification B-4 include 3-5 –h assembler option 3-5 file header defined E-3 linker option 7-12 structure A-5 .half directive 4-13, 4-54 .file symbolic debugging directive B-4 –hc assembler option 3-5 filenames –heap linker option as character strings 3-17 .sysmem section 7-68 copy/include files 3-7 described 7-12...
Page 461 E-4 line-number entry described 7-38 to 7-40 defined E-4 directive B-7 installation instructions. See TMS320C54x Code linker Generation Tools CD-ROM insert assigning symbols 7-57 .int directive 4-13, 4-58 assignment expressions 7-57, 7-58 to 7-59 Intel object format 10-40...
Page 462 linker (continued) lnk500 command 7-4 error messages D-1 to D-30 load address of a section examples 7-71 to 7-74 described 7-41 GROUP statement 7-45, 7-47 referring to with a label 7-42 to 7-44 handling COFF sections 2-12 to 2-14 load linker keyword 2-17, 7-41 to 7-43 in the development flow 7-3 loader, defined E-4 input 7-3, 7-21 to 7-24...
Page 463 malloc(), 7-12, 7-68 mnemonic-to-algebraic translator utility. See translator map file creating 7-16 .mnolist directive 4-17, 4-69 defined E-5 listing control 4-17, 4-41 example 7-73 use in macros 5-21 math functions 3-29 model statement, defined E-5 member, defined E-5 Motorola-S object format 10-41 .member symbolic debugging directive B-8 memory allocation...
Page 464 on-chip boot loader output executable 7-8 to 7-9 boot table 10-28 to 10-33 hex conversion utility 10-24 booting from device peripheral 10-31 linker 7-3, 7-17, 7-71 booting from EPROM 10-33 module booting from the parallel port 10-33 defined E-6 booting from the serial port 10-33 name 7-17 controlling ROM device address 10-35 to 10-37 section...
Page 465 program counters. See SPC device address 10-34 to 10-37 program memory 7-27 model .pstring directive 4-13, 4-83 autoinitialization 7-69 –pw, assembler option 3-5 defined E-6 width defined E-7 described 10-11 to 10-13 romname ROMS specification 10-16 ROMS hex conversion utility –q directive 10-16 to 10-21 absolute lister option 8-3...
Page 466 E-7 simulator, defined E-7 described A-19 sname SECTIONS specification 10-23 .string directive 4-13, 4-83 software installation. See TMS320C54x Code compatibility with C1x/C2x/C2xx/C5x 4-7 Generation Tools CD-ROM insert limiting listing with .option directive 4-17, 4-74 source file string functions 5-9...
Page 467 structure symbolic debugging (continued) .tag 4-21, 4-84 line-number entries B-7 defined E-7 member definitions B-8 definitions A-25, B-9 producing error messages in macros 5-19 –s assembler option 3-6 subsections stripping symbolic information 7-17 defined E-8 structure definitions B-9 initialized 2-6 symbols B-11 overview 2-8 table structure and content A-14 to A-28...
Page 468 .tag directive 4-21, 4-22, 4-84, 4-90 union .tag 4-22, 4-90 target memory, defined E-8 defined E-8 target width 10-10 symbolic debugging directives B-9 –tcsr hex conversion utility option 10-29 .union directive 4-22, 4-90 Tektronix object format 10-43 unsigned, defined E-8 .text directive 2-4, 4-8 .usect directive 2-4, 4-8, 4-93 linker definition 7-60...
Page 469 –x archiver command 6-4 assembler option 3-6, 3-35 hex conversion utility option 10-43 linker option 7-20 X MEMORY attribute 7-29 .xfloat directive 4-13, 4-50 .xlong directive 4-13, 4-63 xref500 command 9-3 Index-16...

Texas Instruments TMS320C54x User Manual

Table of Contents

Chapter 4 Assembler Directives

Chapter 5 Macro Language

Chapter 6 Archiver Description

Chapter 7 Linker Description

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Summary of Contents for Texas Instruments TMS320C54x