Mcbsp Initialization Procedure; Receiver Clock And Frame Configurations - Texas Instruments TMS320C6000 Reference Manual

McBSP Initialization Procedure

7 McBSP Initialization Procedure
Table 13. Receiver Clock and Frame Configurations
CLKR source FSR source
Internal Internal
External Internal
Internal External
External External
62 Multichannel Buffered Serial Port (McBSP)
The McBSP initialization procedure varies depending on the specific system
setup. Section 7.1 provides a general initialization sequence. Section 7.2
provides an initialization sequence for the special case when the external
device provides the transmit frame sync FSX (FSXM = 0).
The transmitter and the receiver of the McBSP can operate independently
from each other. Therefore, they can be placed in or taken out of reset individually
by modifying only the desired bit in the registers without disrupting the other
portion. The steps in the following sections discuss the initialization procedure
for taking both the transmitter and the receiver out of reset. To initialize only
one portion, configure only the portion desired.
The McBSP internal sample rate generator and internal frame sync generator
are shared between the transmitter and the receiver. Table 13 and Table 14
describe their usage base upon the clock and frame sync configurations of the
receiver and transmitter, respectively.
Comment on Configuration
The McBSP internal sample rate generator and internal frame sync generator
are used by the receiver.
Invalid configuration for receiver.
The McBSP internal sample rate generator is used but the internal frame
sync generator is not used by the receiver.
The McBSP internal sample rate generator and internal frame sync generator
are not used by the receiver.
SPRU580C