Xilinx Virtex-6 FPGA User Manual page 99
Gth transceivers
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Table 3-15
Table 3-15: TX Configurable Driver Attributes
Virtex-6 FPGA GTH Transceivers User Guide
UG371 (v2.0) February 16, 2010
defines the TX configurable driver attributes.
Attribute
TX_CFG0_LANE0
TX_CFG0_LANE1
TX_CFG0_LANE2
TX_CFG0_LANE3
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Type
16-bit Binary
This attribute controls the differential voltage
swing.
[15:14]: Reserved: 2'h0
[13]: Active-High TX lane power down
(tx_chpd)
[12:7]: Reserved: 6'h00
[6:3]: TX output swing control and main
tap/cursor control (tx_swing)
[2:0]: TX current bias fine swing control
(tx_ibias)
tx_bias = 0x7
tx_swing
(Binary)
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
TX Configurable Driver
Description
(1)
TX_CFG0_LANE
Voltage Swing
(Hex)
(mV
0x0005
0x000D
0x0015
0x001D
0x0025
0x002D
0x0035
0x003D
0x0045
0x004D
0x0055
1000
0x005D
1050
0x0065
1100
0x006D
1150
0x0075
1200
0x007D
)
PPD
450
500
550
600
650
700
750
800
850
900
950
99
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