Xilinx Virtex-6 FPGA User Manual page 83
Gth transceivers
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Table 3-6
Table 3-6: TX 8B/10B Block Attributes
Attribute
PCS_MODE_LANE0
PCS_MODE_LANE1
PCS_MODE_LANE2
PCS_MODE_LANE3
Virtex-6 FPGA GTH Transceivers User Guide
UG371 (v2.0) February 16, 2010
defines the TX 8B/10B block attributes.
Type
16-bit Hex
This attribute sets the PCS mode.
[15]: Loopback serializer/deserializer RX to serializer/deserializer
TX.
[14]: Loopback PCS TX to PCS RX.
[13:11]: PRBS generator mode
000: None
001: PRBS7
010: PRBS9
011: PRBS11
100: PRBS23
101: PRBS31
Others: Reserved
[10:8]: PRBS checker mode
000: None
001: PRBS7
010: PRBS9
011: PRBS11
100: PRBS23
101: PRBS31
Others: Reserved
[7:4]: PCS RX mode
0000: Zero
0001: 64B/66B
0111: 8B/10B
1010: 16-bit raw data
1011: 20-bit raw data
1100: PRBS
Others: Reserved
[3:0]: PCS TX mode
0000: Zero
0001: 64B/66B
0111: 8B/10B
1010: 16-bit raw data
1011: 20-bit raw data
1100: PRBS
Others: Reserved
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TX 8B/10B Block
Description
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