Xilinx Virtex-6 FPGA User Manual page 140

Chapter 5: Board Design Guidelines
Table 5-1: GTH Quad Pin Descriptions (Cont'd)
Pins
MGTHAVCCRX
MGTHAVTT
MGTHAVCCPLL
MGTHAGND
Figure 5-1
are nominal values. Refer to DS152, Virtex-6 FPGA Data Sheet: DC and Switching
Characteristics for more detailed information.
X-Ref Target - Figure 5-1
Notes relevant to
1.
2.
140
Dir
In (Pad) MGTHAVCCRX is an analog supply for the PLL and the receiver
equalizers.
The nominal voltage is 1.1 V
In (Pad) MGTHAVTT is an analog supply for the transmit driver.
The nominal voltage is 1.2 V
In (Pad) MGTHAVCCPLL is an analog supply for the reference clock buffer
and the PLL.
The nominal voltage is 1.8 V
N/A MGTHAGND is the ground reference for the GTH transceiver
internal circuitry. These pins should be connected to the PCB power
supply ground reference plane.
shows the power supply pin connections for the GTH Quad. The listed voltages
Figure 5-1: Virtex-6 GTH Transceiver Power Supply Connections
Figure 5-1:
The voltages shown are nominal values. Refer to DS152, Virtex-6 FPGA Data Sheet: DC
and Switching Characteristics for values and tolerances.
Capacitor symbols are representative.
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Description
DC
DC
DC
GTH Quad
MGTHAVCCPLL
MGTHAVTT
MGTHAVCC
MGTHAVCCRX
MGTRBIAS
UG371_c5_01_120809
Virtex-6 FPGA GTH Transceivers User Guide
1.8V
1.2V
1.1V
1.1V
1KΩ
1%
UG371 (v2.0) February 16, 2010