General Differential Optimization Guidelines; Breakout Example And Guidelines - Intel Quark SoC X1000 Design Manual

A.4

General Differential Optimization Guidelines

A.4.1

Breakout Example and Guidelines

Maintain differential routing rules in package breakout areas.
Figure A-5. SoC Package Breakout Example
Guidelines are as follows:
• Differential-pair pitch is measured from the center of each trace in the
differential-pair. The distance from the center of either trace in a differential-pair to
the same point of reference on an adjacent differential-pair is described as
interpair pitch (IPP). See
and IPP.
• Differential-pair space is measured from the edge of each trace in the
differential-pair. The distance from the edge of one trace in a differential-pair to the
near edge of an adjacent differential-pair is described as pair-to-pair space. See
Figure A-6
• Maintain the best possible lateral routing symmetry between the two signals of a
differential-pair. (See
• Breakout routing geometries can be found in the Stackup and PCB Considerations
section.
Caution: Maintain routing symmetry between the two signals of a differential-pair. Failure to
maintain symmetry introduces an AC common mode voltage.
Caution: Reduced trace width will increase losses due to skin effects and reduced spacing will
increase crosstalk. Therefore, it is recommended to keep breakout routing as short as
possible.
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Intel Quark™ SoC X1000
PDG
174
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Intel Quark™ SoC X1000—General Differential Signals Design Guidelines
Figure A-6
for the illustration of differential-pair space and pair-to-pair space.
Figure A-7).
for the illustration of differential-pair pitch
Order Number: 330258-002US
June 2014