Revision History - Intel Quark SoC X1000 Design Manual

Revision History

Revision
Removed Section 4.1.7 Difference Between PCIe Ports and Lanes
002
Updated Figure 35 Clock Integration Distribution Diagram
Removed Section 11.3.2 Dual SPI Devices + Bootflash Topology Guidelines
Removed Section 21.17 Considerations for Layout
Removed Figure A-5 Example of Poor Length Matching
Removed Section A.4 General Differential Stackup Guidelines
Removed Section A.7 General Docking Connector Recommendations for Differential
Interfaces
Other changes are marked with change bars
Initial Public Release
001
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Intel Quark™ SoC X1000
PDG
14
Intel
Description
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Quark™ SoC X1000—Revision History
Date
June 2014
March 2014
Order Number: 330258-002US
June 2014