Intel ® Quark™ Soc X1000 - Mdio/Rmii Lom Design Guidelines; Single Phy Solution Interconnect - Intel Quark SoC X1000 Design Manual

LAN Design Considerations and Guidelines—Intel
®
21.3 Intel
Guidelines
This section contains guidelines on how to implement a SoC/PHY single solution on a
system motherboard. It should not be treated as a specification, and the system
designer must ensure through simulations or other techniques that the system meets
the specified timings. The following are guidelines for both SoC MDIO and RMII
interfaces.
Figure 92.

Single PHY Solution Interconnect

June 2014
Order Number: 330258-002US
®
Quark™ SoC X1000
Quark™ SoC X1000 – MDIO/RMII LOM Design
SoC
MAC0_TXDATA_1
MAC0_TXDATA_0
MAC0_RXDATA_1
MAC0_RXDATA_0
RMII_REF_CLK
MAC0_RXDV
MAC0_TXEN
MAC0_MDIO
MAC0_MDC
RMII
RXDATA[1]
RXDATA[0]
TXDATA[1]
TXDATA[0]
REFCLK/X1
RX_DV
TX_EN
MDIO
MDC
MDIO
PHY
®
Intel Quark™ SoC X1000
PDG
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