Pci Express* Expansion Card Routing Pet To Connector - Intel Quark SoC X1000 Design Manual

PCI Express* Design Guidelines—Intel
Table 19.

PCI Express* Expansion Card Routing PET to Connector

Transmission Line Segment
PCB Routing Layer(s)
Optional
Stackup Layer (Microstrip /
Stripline/ Dual Stripline)
Characteristic Impedance
Trace Width (w)
Trace Spacing (S): Between P
and N within a diff pair
Trace Spacing(S1): Between
PCIe PET/PER diff pairs
Trace Spacing(S2): Between
PCIe PET diff pairs and PER
diff pairs
Trace Spacing(S3): Between
PCIe diff pairs and other
4
signals
PET/ PER Trace Segment
Length
1. It may not be possible to maintain the impedance in the break-in, break-out or other pin fields. For
those segments, define the minimum trace width that should be maintained in that segment considering
the manufacturing reliability and skin effect lossetc.
2. Define the edge-to-edge space between differential pairs as multiple of the distance to the nearest
continuous reference plane. For example, if the nearest reference plane is 4 mils away from the signal
layer then a space of 4xh means the edge-to-edge space from one pair to the next pair is 16 mils.
3. Space rules between PET diff pairs and PER diff pairs apply to the Interleaved routing when PET and PER
pairs are routed in interleave mode on the same layer.
Total Trace Length
Number of vias allowed
Length Matching Rules
Length Matching between P and N within a diff. pair
General
Reference plane
DC Blocking Cap
Capacitor Value, size
Capacitor location
Place the capacitors close to slot connectors
Capacitor Placement
June 2014
Order Number: 330258-002US
®
Quark™ SoC X1000
P1/L0
4 Layer
90 Ω diff
15% (MS)
1
4.0 mils
4.0 mils
12.0 mils
2
12.0 mils
3
12.0 mils
max = 400
mils
L1 L2
t t
4 Layer 4 Layer
MS MS MS
90 Ω diff 90 Ω diff
15% (MS) 15% (MS)
4.0 mils 4.0 mils
6.0 mils 6.0 mils
15.0 mils 15.0 mils
18.0 mils 15.0 mils
18.0 mils 15.0 mils
min = 1500
mils max = 200
max = 3000 mils
mils
TX Total Length = 4000 mils
3 via
+/- 10 mils
Continuous Ground Only
L3 L4
t t
4 Layer 4 Layer
MS MS
90 Ω diff 90 Ω diff 15%
15% (MS) (MS)
4.0 mils 4.0 mils
6.0 mils 6.0 mils
15.0 mils 15.0 mils
15.0 mils 15.0 mils
15.0 mils 15.0 mils
max = 200 max = 200
mils mils
0.1 µF
®
Intel Quark™ SoC X1000
t
PDG
45