Via Connecting Gnd To Gnd; Stitching Capacitor Between Vias Connecting Gnd To Gnd - Intel Quark SoC X1000 Design Manual

Figure 98.

Via Connecting GND to GND

Figure 99.

Stitching Capacitor between Vias Connecting GND to GND

Layers
Inter-Layer
Coupling
®
Intel Quark™ SoC X1000
PDG
160
®
Intel Quark™ SoC X1000—LAN Design Considerations and Guidelines
Layers
Layers
Coupling
1
2 GND
3 VCC
4 PWR
5 VCC
6 GND
7
MDI Trace
1
2 GND
H1
3
H2
Power
4
H1<<H2: No via, same GND V
H1>>H2: Stitching capacitor required
H1~H2: Stitching capacitor required
<40 mils
<40 mils
+
Via
10 pF Stitching
Capacitor and Vias
PWR1
PWR2
Order Number: 330258-002US
June 2014