Intel ® 80960Rm/Rn Processor 5 V And 3.3 V Design Considerations; Providing 3.3 V In A 5 V System - Intel i960 Design Manual

Rm/rn i/o processor
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Intel® i960® RM/RN I/O Processor
®
Intel
80960RM/RN Processor 5 V and 3.3 V Design Considerations
9.0
Intel
Design Considerations
9.1

Providing 3.3 V in a 5 V System

In most system board designs, the 5 V system power supply is routed to board components through
a dedicated board layer. With the requirement of a 3.3 V supply for the
not necessary to add a completely new power supply layer to the circuit board. It is possible to
create a 3.3 V "island" around the processor in the existing power supply plane.
Figure 9-17
buffers and TTL-compatible outputs allow the processor to interface with existing TTL-compatible
external logic, without requiring extra components. Thus, the processor runs at 3.3 V and the
system logic can run at 3.3 V or 5 V.
Other important considerations are:
The "island" must be large enough to include the processor, the required power supply
decoupling capacitance, and the necessary connection to the 3.3 V source.
To minimize signal degradation, the gap between the 3.3 V island and the 5 V plane should be
kept to a minimum: typical gap size is about 0.02 inches.
Minimize the number of traces routed across the power plane gap, since each crossing
introduces signal degradation due to the impedance discontinuity that occurs at the gap. For
traces that must cross the gap, route them on the side of the board next to the ground plane to
reduce or eliminate the signal degradation caused by crossing the gap. If this is not possible,
then route the trace to cross the gap at a right angle (90 degrees).
Use liberal decoupling capacitance between the 5 V plane and the 3.3 V island. Decoupling
the island reduces impedance discontinuity.
34
®
80960RM/RN Processor 5 V and 3.3 V
shows a recommended "island" layout. The
RM/RN I/O processor
*
RM/RN I/O
processor, it is
5 V-tolerant input
Design Guide

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