Usb Jtag Module - Xilinx AC701 User Manual

Chapter 1: AC701 Evaluation Board Features

USB JTAG Module

[Figure
JTAG configuration is provided through a Digilent onboard USB-to-JTAG configuration
logic module (U26) where a host computer accesses the AC701 board JTAG chain through
a standard-A plug (host side) to micro-B plug (AC701 board side) USB cable.
A 2-mm JTAG header (J4) is also provided in parallel for access by Xilinx download cables
such as the Platform Cable USB II and the Parallel Cable IV.
The JTAG chain of the AC701 board is illustrated in
allowed at any time regardless of FPGA mode pin settings. JTAG initiated configuration
takes priority over the configuration method selected through the FPGA mode pin settings
at SW1.
X-Ref Target - Figure 1-8
USB
Module
(U26)
or
JTAG
Connector
(J4)
TDO
TDI
When an FMC daughter card is attached to the AC701 board it is automatically added to
the JTAG chain through electronically controlled single-pole single-throw (SPST) switches
U27. The SPST switch is in a normally closed state and transitions to an open state when an
FMC daughter card is attached. Switch U27 adds an attached FMC HPC daughter card to
the FPGAs JTAG chain as determined by the FMC_HPC_PRSNT_M2C_B signal.
The JTAG connectivity on the AC701 board allows a host computer to download
bitstreams to the FPGA using the Xilinx iMPACT software. In addition, the JTAG connector
allows debug tools such as the ChipScope™ Pro Analyzer or a software debugger to access
the FPGA. The iMPACT software tool can also indirectly program the Quad-SPI Flash
memory. To accomplish this, the iMPACT software configures the FPGA with a temporary
design to access and program the Quad-SPI Flash memory device. The JTAG circuit is
shown in
20
1-2, callout 5]
SPST Bus Switch
U27
J30
FMC LPC
Connector
Part of U19
BUFFER TDI TDO
Figure 1-8: JTAG Chain Block Diagram
Figure 1-9.
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Figure
N.C.
Part of U19
BUFFER
1-8. JTAG configuration is
U1
FPGA
TDI
TDO
UG952_c1_08_100212
AC701 Evaluation Board
UG952 (v1.0) October 23, 2012