Sun Microsystems Ultra 27 Service Manual page 116

BIOS POST Code Checkpoints
TABLE B–1
Post Code
8C
8D
8E
90
A1
A2
A4
A7
A9
AA
AB
AC
B1
00
116 Sun Ultra 27 Workstation Service Manual • June 2009, Revision A
BIOS Port 80 POST Code Checkpoints
Description
1. Check validity of RTC value. For example, a value of 5Ah is an invalid value for
RTC minute.
2. Load CMOS settings into BIOS stack. If CMOS checksum fails, use default
value instead.
Prepare BIOS resource map for PCI and PnP use. If ESCD is valid, consider the
ESCD as legacy information.
Early PCI initialization:
■ Enumerate PCI bus number.
■
Assign memory and I/O resource.
■ Search for a valid VGA device and VGA BIOS, and put it into C000:0.
1. If Early_Init_Onboard_Generator is not defined, Onboard clock generator
initialization. Disable respective clock resource to empty âPCI and DIMM slots.
2. Initialize onboard PWM.
3. Initialize onboard H/W monitor devices.
Initialize INT 09 buffer.
Reserved.
1. Program CPU internal MTRR (P6 and PII) for 0–640K memory address.
2. Initialize the APIC for Pentium class CPU.
3. Program early chipset according to CMOS setup. Example: âonboard IDE
controller.
4. Measure CPU speed.
Reserved.
Invoke video BIOS.
Reserved.
1. Initialize double-byte language font (optional).
2. Display information on screen, including award title, CPU type, CPU speed,
and full-screen logo.
Reserved.
Reserved.
Reserved.
(Continued)