BUFFERED ADDRESS BUS
BUFFERED DATA BUS
MCU REC
D0–7
DOT
COUNTER
HAM
COM
HSC
Figure 2–15. Mechanism Control Unit (MCU) Block Diagram (2 of 2)
Principles of Operation
SRAM
16K X 8
STATUS
REGISTER
D0–3
D4–7
BD0–3
PAPER FEED
BD0–3
FIRE
CONTROL
FIRE 0,1,2
LOGIC
AIRFLT
IL
NFLT
NPLAO
NPADO
NRIBFLT
PMD
RIBBON
CONTROL
PF1/2
(4)
PF3/4
NHCK
NUD/HRS
DCMOD
FAULT
I/F
MECH
DRIVER
I/F
(3)
MECH
DRIVER
I/F
DCU I/F
HAMMER
DRIVER
I/F
MECH
DRIVER
I/F
2–21