Dram Thermal Estimation Configuration Data; Channel & Dimm Index Decoding - Intel BX80619I73820 Design Manual

Core i7 extreme edition processor family for the lga2011-0 socket
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7.1.2.6.2
DRAM Thermal Estimation Configuration Data Read/Write
This feature is relevant only when activity-based DRAM temperature estimation
methods are being utilized and would apply to all the DIMMs on all the memory
channels. The write allows the PECI host to configure the ' ' and ' ' variables in
Figure 7-10
T
=
N
T
and T
N
degrees Celsius, ' ' is the DRAM temperature decay factor, ' Energy' is the energy
difference between the current and previous memory transactions as determined by
the processor power control unit and ' ' is the DRAM energy-to-temperature translation
coefficient. The default value of ' ' is 0x3FF. ' ' is defined by the equation:
= (1 -
The 'Thermal Resistance' serves as a multiplier for translation of DRAM energy changes
to corresponding temperature changes and may be derived from actual platform
characterization data. The 'Scaling Factor' is used to convert memory transaction
information to energy units in Joules and can be derived from system/memory
configuration information.
Figure 7-10. DRAM Thermal Estimation Configuration Data
31
RESERVED
7.1.2.6.3
DRAM Rank Temperature Write
This feature allows the PECI host to program the temperature for all the ranks within a
DIMM up to a maximum of four ranks as shown in
Channel inde x are specified through the parameter field as shown in
write is relevant in platforms that do not have on-die or on-board DIMM thermal
sensors to provide memory temperature information or if the processor does not have
direct access to the DIMM thermal sensors.
Table 7-7.
Channel & DIMM Index decoding
Index Encoding
64
for DRAM channel temperature filtering as per the equation below:
T
+
Energy
N-1
are the current and previous DRAM temperature estimates respectively in
N-1
Thermal Resistance)
20
19
Memory Thermal Estimation Configuration Data
000
001
010
011
Scaling Factor)
10
THETA VARIABLE
Figure
Physical Channel#
0
1
2
3
Thermal/Mechanical Specifications and Design Guide
PECI Interface
9
BETA VARIABLE
7-11. The DIMM index and
Table
7-7. This
Physical DIMM#
0
Reserved
Reserved
Reserved
0

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