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Electrical Specifications
Figure 2-17. FSB Source Synchronous 2X (Address) Timing Waveform
ADSTB# (@ driver)
ADSTB# (@ receiver)
Document Number: 318080-002
T0
T
/4
p
BCLK1
BCLK0
T
T
T
H
A# (@ driver)
valid
T
S
A# (@
receiver)
T
= T1: BCLK[1:0] Period
P
T
= T23: Source Sync. Address Output Valid Before Address Strobe
H
T
= T24: Source Sync. Address Output Valid After Address Strobe
J
T
= T27: Source Sync. Address Strobe Setup Time to BCLK
K
T
= T25: Source Sync. Input Setup Time
M
T
= T26: Source Sync. Input Hold Time
N
T
= T20: Source Sync. Output Valid Delay
S
T
= T31: Address Strobe Output Valid Delay
R
T1
T
/2
3T
/4
p
p
R
T
T
J
H
J
valid
valid
T
T
M
N
T2
T
K
valid
49
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