Intel BFCBASE - Motherboard - 7300 Datasheet page 135

Features
7.4.3.8 Feature Data
This section provides information on key features that the platform may need to
understand without powering on the processor.
7.4.3.8.1 Processor Core Feature Flags
This location contains a copy of results in EDX[31:0] from Function 1 of the CPUID
instruction. These details provide instruction and feature support by product family. A
decode of these bits is found in the AP-485 Intel
Instruction application note. Writes to this register have no effect.
Example: A value of BFEBFBFFh can be found at offset 74 - 77h.
Offset:
Bit
31:0
7.4.3.8.2 Processor Feature Flags
This location contains additional feature information from the processor. Writes to this
register have no effect.
Note: Bit 5 and Bit 6 are mutually exclusive (only one bit will be set).
Offset:
Bit
7
6
5
4
3
2
1
0
Bits are set when a feature is present, and cleared when they are not.
Example: A value of A6h can be found at offset 78h.
7.4.3.8.3 Processor Thread and Core Information
This location contains information regarding the number of cores and threads on the
processor. Writes to this register have no effect.
Example: The Intel
cores and one thread per core.
Document Number: 318080-002
74h-77h
Processor Core Feature Flags
0000h-FFFFF: Feature Flags
78h
Multi-Core (set if the processor is a multi core processor)
Serial signature (set if there is a serial signature at offset 4D - 54h)
Electronic signature present (set if there is a electronic signature at 4D - 54h)
Thermal Sense Device present (set if an SMBus thermal sensor on package)
Reserved
OEM EEPROM present (set if there is a scratch ROM at offset 80 - FFh)
Core VID present (set if there is a VID provided by the processor)
L3 Cache present (set if there is a level 3 cache on the processor)
® ®
Xeon Processor 7200 Series and 7300 Series has two or four
®
Processor Identification and CPUID
Description
Description
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