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Features
7.4.3
Processor Information ROM (PIROM)
The lower half (128 bytes) of the SMBus memory component is an electrically
programmed read-only memory with information about the processor. This information
is permanently write-protected.
provides the formats of the data fields included in the Processor Information ROM
(PIROM).
The PIROM consists of the following sections:
• Header
• Processor Data
• Processor Core Data
• Cache Data
• Package Data
• Part Number Data
• Thermal Reference Data
• Feature Data
• Other Data
Table 7-6.
Processor Information ROM Data Sections (Sheet 1 of 3)
Offset/Section
Processor Data:
Processor Core
Document Number: 318080-002
Table 7-6
# of
Bits
Header:
00h
8
Data Format Revision
01 - 02h
16
03h
8
Processor Data Address
04h
8
Processor Core Data
05h
8
L3 Cache Data Address
06h
8
Package Data Address
07h
8
Part Number Data Address
08h
8
Thermal Reference Data
09h
8
Feature Data Address
0Ah
8
Other Data Address
0B - 0Ch
16
0Dh
8
0E - 13h
48
S-spec Number
14h
6
2
Sample/Production
15h
8
Data:
16 - 19h
2
8
Extended Family
4
Extended Model
shows the data fields and
Function
PIROM Size
Byte pointer, 00h if not present
Byte pointer, 00h if not present
Address
Byte pointer, 00h if not present
Byte pointer, 00h if not present
Byte pointer, 00h if not present
Byte pointer, 00h if not present
Address
Byte pointer, 00h if not present
Byte pointer, 00h if not present
Reserved
Checksum
Reserved
Reserved (most significant bits)
00b = Sample, 01b = Production
Checksum
Reserved
Section 7.4.3
Notes
Two 4-bit hex digits
Size in bytes (MSB first)
Reserved
1 byte checksum
Six 8-bit ASCII characters
1 byte checksum
Reserved for future use
From CPUID
From CPUID
119
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