Intel BFCBASE - Motherboard - 7300 Datasheet page 130

7.4.3.4.1 RES3: Reserved 3
These locations are reserved. Writes to this register have no effect.
Offset:
Bit
15:0 RESERVED 3
0000h-FFFFh: Reserved
7.4.3.4.2 L2SIZE: L2 Cache Size
This location contains the size of the level two cache in kilobytes. Writes to this register
have no effect.
Example: The Intel
(8192 KB) L2 cache total. Thus, offset 27 - 28h would contain 2000h.
Offset:
Bit
15:0 L2 Cache Size
0000h-FFFFh: KB
7.4.3.4.3 L3SIZE: L3 Cache Size
This location contains the size of the level three cache in kilobytes. Writes to this
register have no effect.
Example: The Intel
Thus, offset 29 - 2Ah will contain 0000h (0 decimal).
Offset:
Bit
15:0 L3 Cache Size
0000h-FFFFh: KB
7.4.3.4.4 MAXCVID: Maximum Cache VID
This location contains the maximum Cache VID (Voltage Identification) voltage that
may be requested via the CVID pins. This field, rounded to the next thousandth, is in
mV and is reflected in hex. Writes to this register have no effect.
Example: The Intel
Cache VID. Offset 2B - 2Ch will contain 0000h (0 decimal).
Offset:
Bit
15:0 Maximum Cache VID
0000h-FFFFh: mV
130
25h-26h
® ®
Xeon Processor 7200 Series and 7300 Series has a 2x4MB
27h-28h
® ®
Xeon Processor 7200 Series and 7300 Series has no L3 cache.
29h-2Ah
® ®
Xeon Processor 7200 Series and 7300 Series does not utilize a
2Bh-2Ch
Description
Description
Description
Description
Features
Document Number: 318080-002