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5. Board Components
683227 | 2023.07.12
5.6.2. JTAG Chain Control DIP Switch
Table 24.
1
2
3
4
5
6
7
8
Table 25.
ON
OFF
ON
ON
OFF
ON
OFF
OFF
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The JTAG chain control DIP switch (SW3) either removes or includes devices in the
active JTAG chain.
The SW3 switch select controls the JTAG master/slave select. The DIP switch MSTR
switches control the master select. The other 5 pins are bypass pins for the various
available JTAG slaves. The following slaves are available and can be bypassed by
moving the corresponding bypass switch to the 'ON' position.
JTAG Configuration Modes
Switch 3 Bit
Arria 10
I/O MAX V
FMCA
FMCB
PCIe
MSTR[0]
MSTR[1]
MSTR[2]
The
switch settings and their meanings can be seen in the table below.
MSTR
Modes for Master Switches
MSTR2
MSTR1
ON
ON
OFF
ON
OFF
OFF
ON
OFF
Board Label
ON- Arria10 JTAG Bypass
OFF- Arria10 JTAG Enable
ON- MAXV JTAG Bypass
OFF- MAXV JTAG Enable
ON- FMCA JTAG Bypass
OFF- FMCA JTAG Enable
ON- FMCB JTAG Bypass
OFF- FMCB JTAG Enable
ON- PCIe JTAG Bypass
OFF- PCIe JTAG Enable
Refer to
Refer to
Refer to
MSTR0
ON
ON
ON
OFF
OFF
OFF
OFF
ON
®
®
Intel
Arria
Function
Table 25
on page 65
Table 25
on page 65
Table 25
on page 65
Modes
BOOT
FMCA JTAG Master
FMCB JTAG Master
FTRACE JTAG Master
On-Board USB-Blaster II
JTAG Master
System Configuration Mode
GUI Test Mode
Reserved
10 SoC Development Kit User Guide
65
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