4. Board Test System
683227 | 2023.07.12
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Reads the current frequency setting for the oscillator associated with the
active tab.
Sets the frequency for the oscillator associated with the active tab back to
its default value. The default is restored by power cycling the board.
Sets the programmable oscillator frequency for the selected clock to the
value in the CLK0 to CLK3 controls for each Si5338. Frequency changes
might take several milliseconds to take effect. You might see glitches on
the clock during this time. Altera recommends resetting the FPGA logic
after changing frequencies.
Import register map file generated from Silicon Laboratories ClockBuilder
Desktop.
Description
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®
Intel
Arria
10 SoC Development Kit User Guide
47