Table of Contents
Advertisement
5.9. Components and Interfaces
5.9.1. PCI Express
Note:
Figure 25.
®
®
Intel
Arria
70
Arrow.com.
Downloaded from
This section describes the development board's communication ports and interface
cards relative to the Arria 10 SoC device. The development board supports the
following communication ports:
•
PCI Express Gen3 root complex and end point
•
10/100/1000 Ethernet (HPS)
•
10/100/1000 Ethernet (FPGA)
•
FMC
•
RS-232 UART (HPS)
•
Real-Time Clock
•
SFP+
2
•
I
C interface
The PCIe RC interface on the development board supports auto-negotiating channel
width from x1 to x8 as well as the connection speed of Gen3 at 8 Gbps/lane.
The PCI express end point interface is connected to the FMCB slot. A special PCIE-FMC
cable (HDR-181157-01-PCIEC) made by SAMTEC must be plugged into the FMCB slot
for the PCIe EP application.
You can order the PCIE-FMC cable by contacting SAMTEC directly.
For the PCIe RC application, the
input that is driven to the daughtercard through the PCIe edge connector. This signal
connects directly to a Arria 10 SoC
standard is High-Speed Current Steering Logic (HCSL).
PCI Express Reference Clock Levels
Vmax = 1.15 V
REFCLK -
V
= 550 mV
CROSS MAX
V
= 250 mV
CROSS MIN
REFCLK +
V
= -0.30 V
MIN
The PCI Express edge connector also has a presence detect feature for the
motherboard to determine if a card is installed.
10 SoC Development Kit User Guide
signal is a 100-MHz differential
PCIE_REFCLK_P/N
input pin pair using DC coupling. The I/O
REFCLK
5. Board Components
683227 | 2023.07.12
Send Feedback
Advertisement
Table of Contents
