Table of Contents
Advertisement
5. Board Components
683227 | 2023.07.12
Table 46.
REFLCK_3AMux
REFClk_3EMUX
Refsys_3EMUX
REFCLK_3GMUX
FA_EMI_3HMUX
5.9.11.4. FPGA Debug Port
Table 47.
BANK
2A
2A
2A
2A
2A
2A
2A
2A
2A
2A
2A
2A
2A
Send Feedback
Arrow.com.
Downloaded from
3A, 3E, 3G and 3H Bank Reference Clock Selection
MUX ID
CLK_3A
R354
R347
LMK_CLEAN_CLK
R576
R575
LMK_SYSREF
R585
R584
RCLOCK_OUT
R602
R601
FACLK0M2C
R596
R595
This debug port needs support of both the HPS 16-bit trace debug port and Blaster
direct debug port.
FPGA Debug Port
Pin number
Schematic Name
AM19
FTRACE_D0
AM16
FTRACE_D1
AN16
FTRACE_D2
AP16
FTRACE_D3
AR16
FTRACE_D4
AN19
FTRACE_D5
AP19
FTRACE_D6
AR18
FTRACE_D7
AT18
FTRACE_D8
AR17
FTRACE_D9
AT17
FTRACE_D10
AT19
FTRACE_D11
AU19
FTRACE_D12
Select 1 (default)
FBCLK1M2C
R355
R348
FACLK1M2C
R577
R574
FACLK3BDIR
R587
R586
FACLK2BIDIR
R604
R603
CLK_FAEMI
R594
R593
HPS Trace Mode
USER_DIPSW_HPS3 = 0
HPS 16-bit Trace port D0
HPS 16-bit Trace port D1
HPS 16-bit Trace port D2
HPS 16-bit Trace port D3
HPS 16-bit Trace port D4
HPS 16-bit Trace port D5
HPS 16-bit Trace port D6
HPS 16-bit Trace port D7
HPS 16-bit Trace port D8
HPS 16-bit Trace port D9
HPS 16-bit Trace port D10
HPS 16-bit Trace port D11
HPS 16-bit Trace port D12
Intel
Select 2
Select 3
CLK_3E
R579
R578
Blaster Direct Port
USER_DIPSW_HPS3 = 1
Direct_USB_D0
Direct_USB_D1
Direct_USB_D2
Direct_USB_D3
Direct_USB_D4
Direct_USB_D5
Direct_USB_D6
Direct_USB_D7
Direct_USB_RDn
Direct_USB_Wrn
Direct_USB_OEn
Direct_USB_RESETn
Direct_USB_EMPTY
continued...
®
®
Arria
10 SoC Development Kit User Guide
97
Advertisement
Table of Contents
