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Texas Instruments MSPM0L111 Series Advance Information
Texas Instruments MSPM0L111 Series Advance Information

Texas Instruments MSPM0L111 Series Advance Information

Mixed-signal microcontrollers

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1 Features
Core
– Arm
®
32-bit Cortex
protection unit, frequency up to 32MHz
Functional Safety Quality-Managed
– Documentation available to aid in functional
safety system design
Operating characteristics
– Extended temperature: –40°C to 125°C
– Wide supply voltage range: 1.62V to 3.6V
Memories
– Up to 128KB of flash memory with error
correction code (ECC)
Dual-bank with address swap for OTA
updates
– 16KB of SRAM
High-performance analog peripherals
– One 12-bit 1.68Msps analog-to-digital converter
(ADC) with up to 13 total external channels
14-bit effective resolution at 105ksps with
hardware averaging
– Configurable 1.4V or 2.5V internal ADC voltage
reference (VREF)
– Integrated temperature sensor
Optimized low-power modes
– RUN: 106µA/MHz (CoreMark)
– SLEEP: 469µA at 4MHz
– STOP: 52µA at 32kHz
– STANDBY: 1.4µA with RTC and SRAM
retention
– SHUTDOWN: 75nA with IO wake-up capability
Intelligent digital peripherals
– 3-channel DMA controller
– 3-channel event fabric signaling system
– A total of 14 PWM channels supported by:
One 16-bit advanced timer with deadband
support and complimentary outputs,
supporting up to 8 PWM channels
Two 16-bit general-purpose timers, each
with two capture/compare registers
supporting low-power operation in
STANDBY mode
One 16-bit general purpose timer supporting
QEI
– One windowed watchdog timer (WWDT)
– One independent watchdog timer (IWDT)
– RTC with alarm and calendar mode
Enhanced communication interfaces
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. ADVANCE INFORMATION for preproduction products; subject to change
without notice.
MSPM0L111x Mixed-Signal Microcontrollers
®
-M0+ CPU with memory
– Two UART interfaces supporting low-power
operation in STANDBY mode
One extended UART instance supporting
LIN, IrDA, DALI, Smart Card, Manchester
2
– One I
C module supporting up to FM+
(1Mbit/s), SMBus/PMBus, and wakeup from
STOP mode
– One SPI module supporting up to 16Mbit/s
Clock system
– Internal 4 to 32MHz oscillator with ±1.2%
accuracy (SYSOSC)
– Internal 32kHz low-frequency oscillator with
±3% accuracy (LFOSC)
– External 32-kHz crystal oscillator (LFXT)
Data integrity and encryption
– AES-128/256 accelerator with support for GCM/
GMAC, CCM/CBC-MAC, CBC, CTR
– Secure Key Storage for up to two AES keys
– Flexible firewalls for protecting code and data
– True random number generator (TRNG)
– Cyclic redundancy checker (CRCP-16,
CRCP-32)
Flexible I/O features
– Up to 44 GPIOs
Two 5V-tolerant open-drain IOs
Seven high-drive IOs with 20mA drive
strength
One high-speed IO
One Fail-safe IO
Development support
– 2-pin serial wire debug (SWD)
Package options
– 48-pin LQFP (PT) (0.5mm pitch)
– 48-pin VQFN (RGZ) (0.5mm pitch)
– 32-pin VQFN (RHB) (0.5mm pitch)
– 24-pin VQFN (RGE) (0.5mm pitch)
Family members (also see
– MSPM0L1116: 64KB of flash, 16KB of RAM
– MSPM0L1117: 128KB of flash, 16KB of RAM
Development kits and software (also see
and
Software)
– LP-MSPM0L1117 LaunchPad
– MSP Software Development Kit (SDK)
2 Applications
Battery charging and management
Power supplies and power delivery
Personal electronics
Building security and fire safety
Connected peripherals and printers
Energy Infrastructure - Smart Metering
MSPM0L1117, MSPM0L1116
SLASFC9 – DECEMBER 2024
Device
Comparison)
Tools
development kit

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Summary of Contents for Texas Instruments MSPM0L111 Series

  • Page 1 MSPM0L1117, MSPM0L1116 SLASFC9 – DECEMBER 2024 MSPM0L111x Mixed-Signal Microcontrollers – Two UART interfaces supporting low-power 1 Features operation in STANDBY mode • Core • One extended UART instance supporting – Arm ® 32-bit Cortex ® -M0+ CPU with memory LIN, IrDA, DALI, Smart Card, Manchester protection unit, frequency up to 32MHz –...
  • Page 2 MSPM0L1117, MSPM0L1116 www.ti.com SLASFC9 – DECEMBER 2024 • Smart metering • Communication modules • Medical and healthcare • Lighting Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 3 4mm x 4mm MSPM0L1117SRGER MSPM0L1116SRHBR RHB (VQFN, 32) 5mm x 5mm MSPM0L1117SRHBR MSPM0L1116SRGZR RGZ (VQFN, 48) 7mm x 7mm MSPM0L1117SRGZR MSPM0L1116SPTR PT (LQFP, 48) 9mm x 9mm MSPM0L1117SPTR Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 4 VDD, VSS PD1, CPU ACCESS ONLY ROSC VCORE, NRST PD1, CPU/DMA ACCESS CLK_OUT, FCC_IN PD1/PD0, CPU/DMA ACCESS PD0, CPU/DMA ACCESS Figure 4-1. MSPM0L111x Functional Block Diagram Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 5 8.3 Operating Modes............10.7 Glossary..............63 8.4 Security..............11 Revision History............8.5 Power Management Unit (PMU)....... 12 Mechanical, Packaging, and Orderable 8.6 Clock Module (CKM)..........45 Information..............8.7 DMA................Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 6 The package size (length × width) is a nominal value and includes pins, where applicable. For the package dimensions with tolerances, see the Mechanical Data in Section Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 7 5.1 Device Comparison Table 128 KB MSPM0L1117SRGER MSPM0L1117SRHBR MSPM0L1117SRGZR MSPM0L1117SPTR 64 KB MSPM0L1116SRGER MSPM0L1116SRHBR MSPM0L1116SRGZR MSPM0L1116SPTR 24-pin 32-pin 48-pin 48-pin VQFN (0.5mm) VQFN (0.5mm) LQFP (0.5mm) LQFP (0.5mm) Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 8 PB17 PA20 PA28 PA19 NRST PA18 PA31 PA17 PA16 PA15 PA14 PA13 PA12 PB16 PB15 Not to scale Figure 6-1. 48-pin PT (0.5mm) (LQFP) Package Diagram Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 9 PA20 PA28 PA19 NRST PA18 PA31 PA17 PA16 Thermal PA15 PA14 PA13 PA12 PB16 PB15 Not to scale Figure 6-2. 48-pin RGZ (0.5mm) (VQFN) Package Diagram Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 10 Figure 6-3. 32-pin RHB (0.5mm) (VQFN) Package Diagram PA22 NRST PA21 PA20 Thermal PA19 PA18 PA17 Not to scale Figure 6-4. 24-pin RGE (0.5mm) (VQFN) Package Diagram Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 11 (Non-IOMUX 1) 0 NRST RESET WAKE (Non-IOMUX 2) 0 UART0_TX I2C0_SDA TIMA0_C0 TIMA_FAL1 ODIO (5V-tol) PINCM1 FCC_IN 0x40428000 TIMG8_C1 TIMG0_C0 BSLSDA (Non-IOMUX 1) 0 WAKE (Non-IOMUX 2) 0 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 12 SPI0_POCI TIMA0_C1N SDIO LFCLK_IN PINCM9 (standard) 0x40428020 TIMA0_C3 UART1_RX SPI0_CS0 LFXOUT (Non-IOMUX 1) 0 TIMG8_C0 SPI0_PICO SPI0_POCI SDIO TIMG0_C0 PINCM10 (standard) 0x40428024 FCC_IN TIMA_FAL1 UART0_CTS UART1_TX Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 13 SPI0_CS0 I2C0_SDA TIMA0_C0 SDIO PINCM19 (standard) TIMA_FAL2 0x40428048 TIMA_FAL0 SPI0_CS3 HFCLK_IN UART0_RTS UART1_RX SPI0_PICO I2C0_SCL TIMA0_C0N HSIO (high- PINCM20 speed) CLK_OUT 0x4042804c TIMA0_C1 RTC_OUT SPI0_CS0 UART0_CTS Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 14 RTC_OUT SDIO PINCM35 (standard) TIMG0_C1 0x40428088 SPI0_CS3 UART1_RTS A0_9 (Non-IOMUX 1) 0 PA14 UART0_CTS PA14 SPI0_PICO SDIO PINCM36 (standard) CLK_OUT 0x4042808c SPI0_CS2 A0_12 (Non-IOMUX 1) 0 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 15 TIMA0_C2 0x404280a0 TIMG0_C0 PA20 PA20 SWCLK SDIO PINCM42 (standard) TIMA0_C2N 0x404280a4 TIMG0_C1 PA21 SPI0_CS3 PA21 UART1_CTS SDIO PINCM46 (standard) TIMA0_C0 0x404280b4 TIMG8_C0 VREF- (Non-IOMUX 1) 0 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 16 PINCM60 (standard) CLK_OUT 0x404280ec RTC_OUT A0_0 (Non-IOMUX 1) 0 PA28 UART0_TX I2C0_SDA PA28 TIMA0_C3 HDIO (high- PINCM3 drive) TIMA_FAL0 0x40428008 TIMA0_C1 SPI0_CS3 WAKE (Non-IOMUX 1) 0 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 17 TIMA0_C0N 0x40428064 TIMA0_C1 PB14 PB14 TIMA0_C0 SDIO PINCM31 (standard) TIMG8_IDX 0x40428078 SPI0_CS3 PB15 PB15 SDIO PINCM32 (standard) TIMG8_C0 0x4042807c PB16 PB16 SDIO PINCM33 (standard) TIMG8_C1 0x40428080 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 18 OD = Output with open-drain behavior • IOD = Input, output, or simultaneous input and output with open-drain behavior • A = Analog • PWR = Power function Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 19 Frequency clock counter (FCC) input signal 12, 14, 12, 14, HFCLK_IN High frequency clock digital clock input signal LFCLK_IN Low frequency clock digital clock input signal Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 20 GPIO port B input/output 6 GPIO port B input/output 7 GPIO port B input/output 8 GPIO port B input/output 9 PB14 GPIO port B input/output 14 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 21 SPI0 peripheral out controller in signal 17, 8, 13, 18, 13, 18, 10, 15, 12, 15, 12, 15, SPI0_SCK SPI0 serial clock 19, 27, 19, 27, Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 22 46, 5, 46, 5, 10, 22, 10, 12, 12, 16, 12, 16, TIMA_FAL0 Timer fault input 0 15, 30, 19, 3, 46, 19, 3, 46, Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 23 Table 6-16. Voltage Reference Signal Descriptions SIGNAL DESCRIPTION RGE PIN RHB PIN RGZ PIN PT PIN NAME TYPE VREF+ Voltage reference positive input VREF- Voltage reference negative input Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 24 VCC or the device cannot start. For more information, see Section 9.1. Any unused pin with a function that is shared with general-purpose I/O must follow the "PAx, PBx" unused pin connection guidelines. Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 25 VDD/VSS and VCORE/VSS, respectively, as close to the device pins as possible. A low-ESR VCORE capacitor with at least the specified value and tolerance of ±20% or better is required for C and C VCORE Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 26 MCLK=SYSOSC, CoreMark, 4MHz execute from flash SLEEP Mode MCLK=LFCLK, CPU is halted 32KHz 279 TBD 280 TBD 289 TBD 300 TBD 328 TBD SLEEP Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 27 -40°C 25°C 85°C 105°C 125°C PARAMETER UNIT TYP MAX TYP MAX TYP MAX TYP MAX TYP MAX Supply current in SHUTDOWN mode 3.3V 1069 2961 SHDN Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 28 (1) (2) Brown-out-reset voltage level 3 Falling 2.85 2.93 3.01 BOR3- STANDBY mode 2.82 2.92 3.02 BOR3, STBY Level 0 Brown-out reset hysteresis HYS,BOR Levels 1-3 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 29 (after the first flash word) into the flash controller during programming of the sector. Flash word size is 64 data bits (8 bytes). On devices with ECC, the total flash word size is 72 bits (64 data bits plus 8 ECC bits). Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback...
  • Page 30 The start-up time is measured from the time that VDD crosses VBOR0- (cold start-up) to the time that the first instruction of the user program is executed. Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 31 The SYSOSC frequency correction loop (FCL) enables high SYSOSC accuracy via an internal reference resistor when using the FCL. See the SYSOSC section of the technical reference manual for details on computing SYSOSC accuracy. Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback...
  • Page 32 The LFCLK monitor may be used to monitor the LFXT or LFCLK_IN. It will always fault below the MIN fault frequency, and will never fault above the MAX fault frequency. Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 33 -40 °C ≤T ≤130 °C VDD≥2.7V, DRV=1, |I =20mA ,max VDD-0.4 VDD≥1.71V, DRV=1, |I =10mA ,max HDIO VDD≥2.7V, DRV=0, |I =6mA ,max VDD-0.4 VDD≥1.71V, DRV=0, |I =2mA ,max Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 34 VDD ≥ 2.7V, DRV = 0, CL= 20pF ODIO VDD ≥ 1.71V, FM , CL= 20pF - 100pF All output ports Output rise/fall time VDD ≥ 1.71V 0.3*f except ODIO Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 35 The analog input voltage range must be within the selected ADC reference voltage range V to V for valid conversion results. R– The internal reference (VREF) supply current is not included in current consumption parameter I (ADC) Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 36 Use the following equations to solve for the minimum sampling time (T) required for an ADC conversion: 1. Tau = (R ) × C × (C 2. K= ln(2 /Settling error) – ln((C 3. T (Min sampling time) = K × Tau Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 37 BUFCONFIG = {0, 1} , VDD = 2.8 V startup 2.8 V The temperature coefficient of the VREF output is the sum of TC and the temperature coefficient of the internal bandgap VRBUF reference. Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 38 (unless otherwise noted) PARAMETERS TEST CONDITIONS UNIT Clock max speed >= 32MHz SPI clock frequency 1.62 < VDD < 3.6V Peripheral or Controller mode Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 39 Specifies the time to drive the next valid data to the output after the output changing SCLK clock edge Specifies how long data on the output is valid after the output changing SCLK clock edge Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback...
  • Page 40 BITCLK clock frequency(equals BITCLK baud rate in MBaud) AGFSELx = 0 AGFSELx = 1 Pulse duration of spikes suppressed by input filter AGFSELx = 2 AGFSELx = 3 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 41 Latency to generate 256 random bits 51.2 µs LAT256 20MHz 7.21 Emulation and Debug 7.21.1 SWD Timing over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS UNIT SWD frequency Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 42 The Arm Cortex-M0+ is a cost-optimized 32-bit CPU that delivers high performance and low power to embedded applications. Key features of the CPU Sub System include: Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 43 32kHz ULPCLK to 32MHz 32kHz 32kHz 32MHz 32kHz 32kHz 4MHz 4MHz 32kHz TIMG0/8 MFCLK Clocks LFCLK 32kHz LFCLK to TIMG0/1/8 32kHz TIMA0 LFCLK Monitor MCLK Monitor Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 44 Crypto acceleration • True random number generation • Flash write-erase protection • Flash read-execute protection • Flash IP protection • SRAM write-execute mutual exclusion • Secure boot Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 45 The DMA in these devices support the following key features: • 3 independent DMA transfer channels – 1 full-feature channel (DMA0), supporting repeated transfer modes Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 46 – Example: TIMx timer peripheral publishes a periodic event to the ADC subscriber port, and the ADC uses the event to trigger start-of-sampling For more details, see the Event chapter of the MSPM0 L-Series 32MHz Microcontrollers Technical Reference Manual. Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 47 Table 8-5. Peripherals Summary Peripheral Name Base Address Size ADC0 0x4000.4000 0x2000 VREF 0x4003.0000 0x2000 WWDT0 0x4008.0000 0x2000 TIMG0 0x4008.4000 0x2000 TIMG8 0x4009.0000 0x2000 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 48 Peripheral Name NVIC IRQ Group IIDX WWDT0 DEBUGSS FLASHCTL EVENT SUB PORT 0 EVENT SUB PORT 1 SYSCTL GPIOA GPIOB TRNG TIMG8 ADC0 SPI0 UART1 UART0 Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 49 GPIO "FastWake" feature enables low-power wakeup from STOP and STANDBY modes for any GPIO port For more details, see the GPIO chapter of the MSPM0 L-Series 32MHz Microcontrollers Technical Reference Manual. Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 50 A0_9 Temperature Sensor A0_12 Internal VREF A0_13 A0_14 Supply/Battery Monitor For more details, see the ADC chapter of the MSPM0 L-Series 32MHz Microcontrollers Technical Reference Manual. Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 51 AES-CCM and AES-GCM modes support continuation with hold/resume of payload data • 32-bit word access to provide key data, input data, and output data • AESADV ready interrupt Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 52 Active in Stop and Standby Mode Separate transmit and receive FIFOs Support hardware flow control Support 9-bit configuration Support LIN mode Support DALI Support IrDA Support ISO7816 Smart Card Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 53 The LFCLK has a typical frequency of 32kHz and is mainly intended for long-term timekeeping. LFSS in this device contains following components: • Real Time Clock with additional prescalar extension and timestamp captures • An asynchronous Independent Watchdoc Timer Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 54 256Hz or 1Hz RTC time stamp capture upon detection of a timer stamp event, including: • TIO event • VDD fail event RTC counter lock function Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 55 Specific features for the advanced timer (TIMAx) include: • 16-bit timer with up, down or up-down counting modes, with repeat-reload mode • Selectable and configurable clock source Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 56 8.29 Device Analog Connections Figure 8-2 shows the internal analog connection of the device. A0_0:A0_9 Temp Sense ADC0 A0_12:A0_14 12:14 Internal VREF Supply/Battery Monitor Figure 8-2. Analog Connections Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 57 PIPU PIPD SHUTDOWN The 5V-tolerant open drain IO type does not have the RELEASE output-high PMOS, pullup resistor, or clamping diode. Figure 8-3. Superset Input/Output Diagram Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 58 Refer to the Factory Constants chapter of the MSPM0 L-Series 32MHz Microcontrollers Technical Reference Manual. Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 59 The device revision and identification information are also included as part of the top-side marking on the device package. The device-specific errata describes these markings (see Section 10.3). Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 60 Debug tool are optional, but SWCLK NRST must be Debug interface pulled high to VDD for the device to start. Figure 9-1. Basic Application Schematic Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 61 No marking = Tube or tray For orderable part numbers of MSP devices in different package types, see the Package Option Addendum of this document, ti.com, or contact your TI sales representative. Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links:...
  • Page 62 Notifications to register and receive a weekly digest of any product information that has changed. For change details, review the revision history included in any revised document. Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 63 All trademarks are the property of their respective owners. 10.6 Electrostatic Discharge Caution This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
  • Page 64 This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation. Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 65 ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links:...
  • Page 66 4219013/A 05/2017 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view.
  • Page 67 SCALE:20X 4219013/A 05/2017 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 68 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 69 4223442/B 08/2019 NOTES: (continued) 4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view.
  • Page 70 SCALE:20X 4223442/B 08/2019 NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. Submit Document Feedback Copyright © 2024 Texas Instruments Incorporated Product Folder Links: MSPM0L1117 MSPM0L1116...
  • Page 71 PACKAGE OPTION ADDENDUM www.ti.com 25-Dec-2024 PACKAGING INFORMATION Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples Drawing Ball material (4/5) XMSM0L1117SPTR ACTIVE LQFP 1000 Call TI Call TI -40 to 125 Samples XMSM0L1117SRGER...
  • Page 72 PACKAGE OPTION ADDENDUM www.ti.com 25-Dec-2024 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
  • Page 73 GENERIC PACKAGE VIEW RGE 24 VQFN - 1 mm max height PLASTIC QUAD FLATPACK - NO LEAD Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4204104/H...
  • Page 74 GENERIC PACKAGE VIEW RHB 32 VQFN - 1 mm max height PLASTIC QUAD FLATPACK - NO LEAD 5 x 5, 0.5 mm pitch Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4224745/A www.ti.com...
  • Page 75 GENERIC PACKAGE VIEW RGZ 48 VQFN - 1 mm max height PLASTIC QUADFLAT PACK- NO LEAD 7 x 7, 0.5 mm pitch Images above are just a representation of the package family, actual package may vary. Refer to the product data sheet for package details. 4224671/A www.ti.com...
  • Page 76 PACKAGE OUTLINE PT0048A LQFP - 1.6 mm max height SCALE 2.000 LOW PROFILE QUAD FLATPACK 0.27 0.17 0.08 C A B 44X 0.5 4X 5.5 SEE DETAIL A 1.6 MAX SEATING PLANE 0.1 C 1.45 0.25 1.35 GAGE PLANE 0.75 0.05 MIN 0 -7 0.45...
  • Page 77 EXAMPLE BOARD LAYOUT PT0048A LQFP - 1.6 mm max height LOW PROFILE QUAD FLATPACK SYMM SEE SOLDER MASK DETAILS 48X (1.6) 48X (0.3) 44X (0.5) PKG SYMM (8.2) (R0.05) TYP (8.2) LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE 10.000 0.05 MAX 0.05 MIN ALLAROUND ALL AROUND...
  • Page 78 EXAMPLE STENCIL DESIGN PT0048A LQFP - 1.6 mm max height LOW PROFILE QUAD FLATPACK SYMM 48X (1.6) 48X (0.3) 44X (0.5) PKG SYMM (8.2) (R0.05) TYP (8.2) SOLDER PASTE EXAMPLE BASED ON 0.1 mm THICK STENCIL SCALE: 10X 4215159/B 11/2023 NOTES: (continued) 7.
  • Page 79 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products. TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2024, Texas Instruments Incorporated...