Flash Memory Characteristics - Texas Instruments MSPM0G350 Series Manual

Automotive mixed-signal microcontrollers with can-fd interface
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MSPM0G3507-Q1, MSPM0G3506-Q1, MSPM0G3505-Q1
SLASF88 – OCTOBER 2023
POR
BOR0+
BOR0-
POR+
POR-

7.7 Flash Memory Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETER
Supply
VDD
Program and erase supply voltage
PGM/ERASE
Supply current from VDD during erase
IDD
ERASE
operation
Supply current from VDD during
IDD
PGM
program operation
Endurance
Erase/program cycle endurance (lower
NWEC
(LOWER)
32kB flash)
Erase/program cycle endurance
NWEC
(UPPER)
(remaining flash)
NE
Total erase operations before failure
(MAX)
Write operations per word line before
NW
(MAX)
sector erase
Retention
t
Flash memory data retention
RET_85
t
Flash memory data retention
RET_105
Program and Erase Timing
t
Program time for flash word
PROG (WORD, 64)
t
Program time for 1kB sector
PROG (SEC, 64)
t
Sector erase time
ERASE (SEC)
t
Sector erase time
ERASE (SEC)
t
Sector erase time
ERASE (SEC)
t
Bank erase time
ERASE (BANK)
(1)
The lower 32kB flash address space supports higher erase/program endurance to enable EEPROM emulation applications. On
devices with <=32kB flash memory, the entire flash memory supports NWEC
(2)
Total number of cumulative erase operations supported by the flash before failure. A sector erase or bank erase operation is
considered to be one erase operation.
(3)
Maximum number of write operations allowed per word line before the word line must be erased. If additional writes to the same word
line are required, a sector erase is required once the maximum number of write operations per word line is reached.
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BOR
Running
No reset
asserted
BOR
BOR
released
asserted
POR
released
POR/BOR levels are met
for specified |dVDD/dt|
Figure 7-1. Power Cycle POR and BOR Conditions
Supply current delta
Supply current delta
(1)
(1)
(2)
(3)
-40°C <= Tj <= 85°C
-40°C <= Tj <= 105°C
(4) (6)
(5) (6)
≤2k erase/program cycles,
T
≤10k erase/program cycles,
T
<10k erase/program cycles
<10k erase/program cycles
Product Folder Links:
MSPM0G3507-Q1 MSPM0G3506-Q1 MSPM0G3505-Q1
BOR
Running
BOR
released
POR
asserted
Time (t)
TEST CONDITIONS
≥25°C
j
≥25°C
j
erase/program cycles.
(LOWER)
POR BOR
Running
BOR
released
POR
released
MIN
TYP
MAX
1.62
3.6
10
10
100
k cycles
10
k cycles
802
k erase operations
83
write operations
60
11.4
50
275
6.4
4
20
20
150
20
200
22
220
Copyright © 2023 Texas Instruments Incorporated
www.ti.com
UNIT
V
mA
mA
years
years
µs
ms
ms
ms
ms
ms

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