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6.2 Pin Attributes
The following table describes the functions available on every pin for each device package.
Each digital I/O on a device is mapped to a specific Pin Control Management Register (PINCMx) that
lets users configure the desired Pin Function using the PINCM.PF control bits.
PIN
PINCMx
NAME
ANALOG
N/A
N/A
N/A
N/A
1
PA0
2
PA1
7
PA2
ROSC
8
PA3
LFXIN
9
PA4
LFXOUT
10
PA5
HFXIN
11
PA6
HFXOUT
14
PA7
19
PA8
20
PA9
21
PA10
22
PA11
34
PA12
35
PA13 COMP0_IN2-
Copyright © 2023 Texas Instruments Incorporated
Table 6-1. Pin Attributes
SIGNAL NAMES
DIGITAL [PIN FUNCTION]
VDD
VSS
VCORE
NRST
UART0_TX [2] / I2C0_SDA [3] / TIMA0_C0 [4] /
TIMA_FAL1 [5] / TIMG8_C1 [6] / FCC_IN [7]/(Default
BSL I2C_SDA)
UART0_RX [2] / I2C0_SCL [3] / TIMA0_C1 [4] /
TIMA_FAL2 [5] / TIMG8_IDX [6] / TIMG8_C0 [7]/
(Default BSL I2C_SCL)
TIMG8_C1 [2] / SPI0_CS0 [3] / TIMG7_C1 [4] /
SPI1_CS0 [5]
TIMG8_C0 [2] / SPI0_CS1 [3] / UART2_CTS [4] /
TIMA0_C2 [5] / COMP1_OUT [6] / TIMG7_C0 [7] /
TIMA0_C1 [8] / I2C1_SDA [9]
TIMG8_C1 [2] / SPI0_POCI [3] / UART2_RTS
[4] / TIMA0_C3 [5] / LFCLK_IN [6] / TIMG7_C1 [7] /
TIMA0_C1N [8] / I2C1_SCL [9]
TIMG8_C0 [2] / SPI0_PICO [3] / TIMA_FAL1 [4] /
TIMG0_C0 [5] / TIMG6_C0 [6] / FCC_IN [7]
TIMG8_C1 [2] / SPI0_SCK [3] / TIMA_FAL0 [4] /
TIMG0_C1 [5] / HFCLK_IN [6] / TIMG6_C1 [ 7] /
TIMA0_C2N [8]
COMP0_OUT [2] / CLK_OUT [3] / TIMG8_C0 [4] /
TIMA0_C2 [5] / TIMG8_IDX [6] / TIMG7_C1 [7] /
TIMA0_C1 [8]
UART1_TX [2] / SPI0_CS0 [3] / UART0_RTS [4] /
TIMA0_C0 [5] / TIMA1_C0N [6]
UART1_RX [2] / SPI0_PICO [3] / UART0_CTS [4] /
TIMA0_C1 [5] / RTC_OUT [6] / TIMA0_C0N [7] /
TIMA1_C1N [8] / CLK_OUT [9]
UART0_TX [2] / SPI0_POCI [3] / I2C0_SDA [4] /
TIMA1_C0 [5] / TIMG12_C0 [6] / TIMA0_C2 [7] /
I2C1_SDA [8] / CLK_OUT [9]/(Default BSL UART_TX)
UART0_RX [2] / SPI0_SCK [3] / I2C0_SCL [4] /
TIMA1_C1 [5] / COMP0_OUT [6]/ TIMA0_C2N [7] /
I2C1_SCL [8]/(Default BSL UART_RX)
UART3_CTS [2] / SPI0_SCK [3] / TIMG0_C0 [4] /
CAN_TX [5] / TIMA0_C3 [6] / FCC_IN [7]
UART3_RTS [2] / SPI0_POCI [3] / UART3_RX [4] /
TIMG0_C1 [5] / CAN_RX [6] / TIMA0_C3N [7]
Product Folder Links:
MSPM0G3507-Q1 MSPM0G3506-Q1 MSPM0G3505-Q1
MSPM0G3507-Q1, MSPM0G3506-Q1, MSPM0G3505-Q1
Note
(1)
SLASF88 – OCTOBER 2023
PIN NUMBER
STRUCTU
40
6
4
7
3
Power
41
7
5
8
4
Power
32
48
32
3
23
Power
38
4
3
6
2
Reset
5V Tol.
33
1
1
4
24
Open-
Drain
5V Tol.
34
2
2
5
1
Open-
Drain
42
8
6
9
5
Standard
43
9
7
10
6
Standard
44
10
8
11
7
Standard
45
11
9
12
-
Standard
46
12
10
13
-
Standard
49
13
11
–
-
Standard
54
16
12
–
-
Standard
High-
55
17
13
14
8
Speed
56
18
14
15
9
High-Drive
57
19
15
16
10
High-Drive
High-
5
27
16
–
-
Speed
High-
6
28
17
–
-
Speed
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