Thermal Information - Texas Instruments MSPM0G350 Series Manual

MSPM0G3507-Q1, MSPM0G3506-Q1, MSPM0G3505-Q1
SLASF88 – OCTOBER 2023
7.3 Recommended Operating Conditions (continued)
over operating free-air temperature range (unless otherwise noted)
MCLK, CPUCLK frequency with 2 flash wait states
f MCLK, CPUCLK frequency with 1 flash wait state
MCLK (PD1 bus clock)
MCLK, CPUCLK frequency with 0 flash wait states
f ULPCLK frequency
ULPCLK (PD0 bus clock)
(1) Connect C and C
VDD VCORE
capacitor with at least the specified value and tolerance of ±20% or better is required for C
(2) The VCORE pin must only be connected to C
(3) Wait states are managed automatically by the system controller (SYSCTL) and do not need to be configured by application software
unless MCLK is sourced from a high speed clock source (HSCLK sourced from HFCLK or SYSPLL).

7.4 Thermal Information

THERMAL METRIC
R Junction-to-ambient thermal resistance
θJA
R Junction-to-case (top) thermal resistance
θJC(top)
R Junction-to-board thermal resistance
θJB
Ψ Junction-to-top characterization parameter
JT
Ψ Junction-to-board characterization parameter
JB
R Junction-to-case (bottom) thermal resistance
θJC(bot)
R Junction-to-ambient thermal resistance
θJA
R Junction-to-case (top) thermal resistance
θJC(top)
R Junction-to-board thermal resistance
θJB
Ψ Junction-to-top characterization parameter
JT
Ψ Junction-to-board characterization parameter
JB
R Junction-to-case (bottom) thermal resistance
θJC(bot)
R Junction-to-ambient thermal resistance
θJA
R Junction-to-case (top) thermal resistance
θJC(top)
R Junction-to-board thermal resistance
θJB
Ψ Junction-to-top characterization parameter
JT
Ψ Junction-to-board characterization parameter
JB
R Junction-to-case (bottom) thermal resistance
θJC(bot)
R Junction-to-ambient thermal resistance
θJA
R Junction-to-case (top) thermal resistance
θJC(top)
R Junction-to-board thermal resistance
θJB
Ψ Junction-to-top characterization parameter
JT
Ψ Junction-to-board characterization parameter
JB
R Junction-to-case (bottom) thermal resistance
θJC(bot)
R Junction-to-ambient thermal resistance
θJA
R Junction-to-case (top) thermal resistance
θJC(top)
R Junction-to-board thermal resistance
θJB
Ψ Junction-to-top characterization parameter
JT
Ψ Junction-to-board characterization parameter
JB
R Junction-to-case (bottom) thermal resistance
θJC(bot)
28 Submit Document Feedback
between VDD/VSS and VCORE/VSS, respectively, as close to the device pins as possible. A low-ESR
. Do not supply any voltage or apply any external load to the VCORE pin.
VCORE
(1)
Product Folder Links: MSPM0G3507-Q1 MSPM0G3506-Q1 MSPM0G3505-Q1
MIN
(3)
(3)
(3)
and C
VDD
PACKAGE
LQFP-64 (PM)
VQFN-48 (RGZ)
LQFP-48 (PT)
VQFN-32 (RHB)
VSSOP-28 (DGS28)
Copyright © 2023 Texas Instruments Incorporated
www.ti.com
NOM MAX UNIT
80
48 MHz
24
40 MHz
.
VCORE
VALUE UNIT
63.9 °C/W
23.8 °C/W
35.3 °C/W
2.2 °C/W
35 °C/W
N/A °C/W
30.1 °C/W
20.7 °C/W
12.5 °C/W
0.3 °C/W
12.4 °C/W
4.2 °C/W
69.2 °C/W
27.4 °C/W
32.6 °C/W
2.6 °C/W
32.3 °C/W
N/A °C/W
32.1 °C/W
23.6 °C/W
13.0 °C/W
0.3 °C/W
13.0 °C/W
3.3 °C/W
78.9 °C/W
38.6 °C/W
41.3 °C/W
3.4 °C/W
41.0 °C/W
N/A °C/W