Table 3: Rear I/O Interfaces - Kontron VX3030 User Manual

3u vpx computing node
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VX3030 User's Guide
Function
PCI Express
SATA Storage
USB
Gigabit Ethernet
Serial
GPIOs
DisplayPort
Utilities
Clocks
Power Supplies
CA.DT.A87-5e
>
1 x4 gen2 PCIe non transparent capability, on P1. Optional use
of PCIe common reference clock feature.
>
1 x1 additional PCIe interface, gen1, on P2
>
2 SATA II link on P1
>
2 additional SATA II links on P2
>
2USB 2.0 link on P1
>
2 additional USB 2.0 link on P2
>
2 SerDes 1000BASE-BX on P1
>
one 1000Base-T on P1
>
2 asynchronous EIA-232/EIA-485 RX/TX serial line, on P2
>
3 User GPIOs on P1, including OpenVPX GDISCRETE1, and
MASKABLE RESET
>
3 additional GPIOs on P0, replacing unused JTAG pins
2 embedded DisplayPort on P2
On P0 and P1: SYSRESET, SYSCON,
6 Geographical Addresses
On P0: 25 MHz Refclock, 1 PPS Auxclock,
optional PCIe 100 MHz clock
On P0: VS1=12V, VS2= 3V3, VS3=5V,
3.3V_AUX optional, +12V_AUX not connected,

Table 3: Rear I/O Interfaces

Description
Introduction
See also
Section 4.3 for
VPX Connectors
Description
Section 4.3 for
VPX Connectors
Description
Section 4.3 for
VPX Connectors
Description
Section 4.3 for
VPX Connectors
Description
Page 11

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