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VX3030 User's Guide
2.3.1
Microswitch SW1 Description
Function
1 - Factory Test Mode
2 - VPD (Vital Product Data) EEPROM write
protect
3 - System (base software parameters)
EEPROM write protect
4 - FRAM (Ferro Magnetic RAM) write
protect
2.3.2
Microswitch SW2 Description
Function
1 - Rescue Boot Flash
2 - Power on wait
3 - CPU performance limitation
4 - Reserved
2.3.3
Microswitch SW3 Description
Function
1 - VPX PCI-E port size
2 - Maximum PCI-E link speed on VPX
3 - Reserved
4 - SPD debug mode
CA.DT.A87-5e
on: factory test mode is selected
off: normal operation
on: VPD 32Kx8 EEPROM is write protected
off: VPD 32Kx8 EEPROM is not write protected unless VPX sig
nal NVMRO is active (logic 1)
on: System 32Kx8 EEPROM is write protected
off: System 32Kx8 EEPROM is not write protected unless VPX
signal NVMRO is active (logic 1)
on: 64Kx8 User FRAM is write protected
off: 64Kx8 User FRAM is not write protected whatever the level
of the NVMRO VPX signal is
Table 9: Microswitches SW1
on: CPU boots the BIOS from its rescue flash.
off: Normal operation. CPU boots the BIOS from its non rescue
flash.
on: VX3030 card waits for an I2C command from the VPX bus
to start internal power on.
off: Normal operation. VX3030 card automatically powers on.
on: Forced to 1.2 GHz
off: Normal operation.
Table 10: Microswitches SW2
on: four x1 ports on VPX PI
off: one x4 port on VPX P1
on: Gen 2 (5 GT/s), will achieve Gen 2 speed transfers if link
partner is advertising Gen 2 capability
off: Gen 1 (2.5 GT/s), to be used with low speed capability
backplane
on: DDR3 SPD debug mode
off: normal operation
Table 11: Microswitches SW3
Description
Description
Description
Installation
Page 21
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