Ebus Dma/Tcr Registers - Sun Microsystems Ultra 80 Service Manual

CODE EXAMPLE 4-9
SUBTEST='status_reg_walk1'
SUBTEST='line_size_walk1'
SUBTEST='latency_walk1'
SUBTEST='line_walk1'
SUBTEST='pin_test'
Enter (0-12 tests, 13 -Quit, 14 -Menu) ===>
4.8.4

EBus DMA/TCR Registers

The EBus DMA/TCR registers diagnostic performs the following:
TABLE 4-8
Test
DMA_reg_test
DMA_func_test
The following code example shows the EBus DMA/TCR registers output message.
CODE EXAMPLE 4-10
Enter (0-12 tests, 13 -Quit, 14 -Menu) ===> 1
TEST='all_dma/ebus_test'
SUBTEST='dma_reg_test'
SUBTEST='dma_func_test'
Enter (0-12 tests, 13 -Quit, 14 -Menu) ===>
-20 Sun Ultra 80 Service Manual • March 2000
PCI/Cheerio Diagnostic Output Message (Continued)
EBus DMA/TCR Registers Diagnostic
Function
Performs a walking ones bit test for control status register, address
register, and byte count register of each channel. Verifies that the
control status register is set properly.
Validates the DMA capabilities and FIFOs. Test is executed in a
DMA diagnostic loopback mode. Initializes the data of transmitting
memory with its address, performs a DMA read and write, and
verifies that the data received is correct. Repeats for four channels.
EBus DMA/TCR Registers Diagnostic Output Message