Running the GTX IBERT Demonstration
3.
X-Ref Target - Figure 1-29
Open Cable Button
4.
X-Ref Target - Figure 1-30
Starting the SuperClock-2 Module
The IBERT demonstration designs use an integrated ChipScope Pro software VIO core to
control the clocks on the SuperClock-2 module. The SuperClock-2 module features two
clock-source components: 1) An always-on Si570 crystal oscillator and, 2) an Si5386
jitter-attenuating clock multiplier. Outputs from either device can be used to drive the
transceiver reference clocks. To start the SuperClock-2 Module:
26
Click the Open Cable button
Figure 1-29: Open Cable Button
When the dialog appears asking to set up the core with the settings from the current
project, click Yes
(Figure
Figure 1-30: Core Settings Dialog
www.xilinx.com
(Figure
1-29).
1-30).
UG806_c1_29_041411
ug806_c1_30_041411
ML628 IBERT Getting Started Guide
UG806 (v1.0) May 20, 2011