In Case Of Rx Bit Errors; Dc Blocks - Xilinx IBERT ML628 Getting Started Manual

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X-Ref Target - Figure 1-19

In Case of RX Bit Errors

If after the Reset All button
or more Quads displays a non-zero value, click the respective BERT Reset button
(Figure
X-Ref Target - Figure 1-20
If RX bit errors persist after clicking the BERT Reset buttons, additional tuning of the
transceivers might be required and/or one or more DC blocks might need to be installed in
line with the loopback cables. See

DC Blocks

The GTH receiver analog front end (AFE) does not support DC coupling (see UG371,
Virtex-6 FPGA GTH Transceivers User Guide for details). For this reason, a DC component in
ML628 IBERT Getting Started Guide
UG806 (v1.0) May 20, 2011
Figure 1-19: GTH IBERT Console
(Figure
1-20) to zero the count.
Figure 1-20: Resetting the RX Bit Error Count
www.xilinx.com
Running the GTH IBERT Demonstration
1-18) has been pressed the RX Bit Error Count for one
DC Blocks
for installation instructions.
ug806_c1_19_050411
UG806_c1_20_041411
19

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