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LTM4700
PACKAGE DESCRIPTION
PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE
LAYOUT CAREFULLY .
Table 22. LTM4700 BGA Pinout
PIN ID
FUNCTION
PIN ID
A1
SW1
B1
A2
SW1
B2
A3
GND
B3
A4
GND
B4
A5
GND
B5
A6
V
B6
IN1
A7
V
B7
IN1
A8
V
B8
IN1
A9
GND
B9
A10
GND
B10
A11
GND
B11
A12
V
B12
OUT1
A13
V
B13
OUT1
A14
V
B14
OUT1
A15
V
B15
OUT1
PIN ID
FUNCTION
PIN ID
G1
SW1
H1
G2
SW1
H2
G3
GND
H3
G4
GND
H4
G5
GND
H5
G6
V
H6
IN1
G7
V
H7
IN1
G8
V
H8
IN1
G9
GND
H9
G10
V
H10
DD25
G11
GND
H11
G12
GND
H12
G13
GND
H13
G14
TSNS1b
H14
G15
V
H15
OUT1
122
FUNCTION
PIN ID
FUNCTION
SW1
C1
SW1
SW1
C2
SW1
GND
C3
GND
GND
C4
GND
GND
C5
GND
V
C6
V
IN1
IN1
V
C7
V
IN1
IN1
V
C8
V
IN1
IN1
GND
C9
GND
GND
C10
GND
GND
C11
GND
V
C12
V
OUT1
OUT1
V
C13
V
OUT1
OUT1
V
C14
V
OUT1
OUT1
V
C15
V
OUT1
OUT1
FUNCTION
PIN ID
FUNCTION
SW1
J1
SW1
SW1
J2
SW1
GND
J3
GND
GND
J4
GND
GND
J5
GND
V
J6
V
IN1
IN1
V
J7
V
IN1
IN1
V
J8
WP
IN1
V
J9
V
TRIM1_CFG
TRIM0_CFG
V
J10
V
OUT1_CFG
OUT0_CFG
ASEL
J11
F
SWPH_CFG
FAULT1
J12
RUN0
FAULT0
J13
ALERT
SDA
J14
SCL
V
J15
V
OUT1
OUT1
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PIN ID
FUNCTION
PIN ID
D1
SW1
E1
D2
SW1
E2
D3
GND
E3
D4
GND
E4
D5
GND
E5
D6
V
E6
IN1
D7
V
E7
IN1
D8
V
E8
IN1
D9
GND
E9
D10
GND
E10
D11
GND
E11
D12
V
E12
OUT1
D13
V
E13
OUT1
D14
V
E14
OUT1
D15
V
E15
OUT1
PIN ID
FUNCTION
PIN ID
K1
SW1
L1
K2
SW1
L2
K3
GND
L3
K4
GND
L4
K5
GND
L5
K6
V
L6
IN1
K7
V
L7
IN1
K8
SHARE_CLK
L8
K9
V
L9
DD33
K10
GND
L10
K11
GND
L11
K12
RUN1
L12
K13
TSNS0a
L13
K14
SYNC
L14
K15
V
L15
OUT1
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FUNCTION
PIN ID
FUNCTION
SW1
F1
SW1
SW1
F2
SW1
GND
F3
GND
GND
F4
GND
GND
F5
GND
V
F6
V
IN1
IN1
V
F7
V
IN1
IN1
V
F8
V
IN1
IN1
GND
F9
GND
GND
F10
GND
GND
F11
GND
V
F12
V
OUT1
OUT1
V
F13
V
OUT1
OUT1
V
F14
V
OUT1
OUT1
V
F15
V
OUT1
OUT1
FUNCTION
PIN ID
FUNCTION
GND
M1
GND
GND
M2
GND
GND
M3
GND
GND
M4
GND
GND
M5
GND
GND
M6
GND
GND
M7
GND
–
COMP1a
M8
V
OSNS1
+
COMP1b
M9
V
OSNS1
SGND
M10
SGND
SGND
M11
SGND
SGND
M12
SGND
TSNS1a
M13
COMP0b
GND
M14
GND
GND
M15
GND
Rev. B
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