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PIN FUNCTIONS
V
(K9): Internally Generated 3.3V Power Supply Output
DD33
Pin. This pin should only be used to provide external current
for the pull-up resistors required for FAULTn, SHARE_CLK,
and SYNC, and may be used to provide external current
for pull-up resistors on RUNn, SDA, SCL and ALERT. No
external decoupling is required.
TSNS0a (K13), TSNS0b (T14): Channel 0 Temperature
Excitation/Measurement and Thermal Sensor Pins, Re-
spectively. Connect TSNS0a to TSNS0b. This allows the
LTM4700 to monitor the Power Stage Temperature of
Channel 0.
SYNC (K14): PWM Clock Synchronization Input and Open-
Drain Output Pin. The setting of the FREQUENCY_SWITCH
command dictates whether the LTM4700 is a "sync master"
or "sync slave" module. When the LTM4700 is a sync
master, FREQUENCY_SWITCH contains the commanded
switching frequency of Channels 0 and 1 in PMBus linear
data format and it drives its SYNC pin low for 500ns at a
time, at this commanded rate. Whereas, a sync slave uses
MFR_CONFIG_ALL[4] = 1b and does not pull its SYNC pin
low. The LTM4700's PLL synchronizes the LTM4700's
PWM clock to the waveform present on the SYNC pin
and therefore, a resistor pull-up to 3.3V is required in
the application, regardless of whether the LTM4700 is a
sync master or slave. EXCEPTION: driving the SYNC pin
with an external clock is permissible; see the Applications
Information section for details.
GND (L1, M1, L2, M2, A3-AB3, A4-AB4, A5-AB5, L6,
M6, L7, M7, N8, P8, A9-G9, P9-U9, W9-AB9, A10-F10,
K10, N10, P10, T10-W10, AA10, AB10, A11-G11, K11,
N11-R11, U11-AB11, G12, N12-T12, G13, T13, L14,
M14, L15, M15): Power Ground Pins for Both Input and
Output Returns.
SGND (L10, M10, L11, M11, L12, M12): SGND is the
signal ground return path of the LTM4700. SGND is not
internally connected to GND. Connect SGND to GND local
to the LTM4700. See recommended layout.
TSNS1a (L13), TSNS1b (G14): Channel 1 Temperature
Excitation/Measurement and Thermal Sensor Pins, Re-
spectively. Connect TSNS1a to TSNS1b. This allows the
LTM4700 to monitor the Power Stage Temperature of
Channel 1.
COMP0b (M13), COMP1b (L9): Current Control Threshold
and Error Amplifier Compensation Nodes for Channels 0
and 1, Respectively. The trip threshold of each channel's
current comparator increases with a respective rise in
COMPnb voltage. Small filter capacitors (22pF) internal
to the LTM4700 on these COMPnb pins (terminated to
SGND) introduce high frequency roll off of the error ampli-
fier response, yielding good noise rejection in the control
loop. See COMP0a/COMP1a.
SW0 (N1-AB1, N2-AB2), SW1 (A1-K1, A2-K2): Switching
node of each channel that is used for internal connection
purposes. Connect all the SWn pins with big copper area to
reduce resistance. An R-C snubber network can be applied
to reduce or eliminate switch node ringing, or otherwise
leave floating. See the Applications Information section.
V
(N6-AB6, N7-AB7, R8-AB8) V
IN0
H8): Power Input Pins. Apply input voltage between these
pins and GND pins. Recommend placing input decoupling
capacitance directly between V
V
(T11): Internal 5V Buck Regulator Output for MOSFET
BIAS
Driver. Decouple this pin with a 22µF ceramic capacitor
to GND.
COMP0a (N13), COMP1a (L8): Loop Compensation Nodes.
An internal PWM loop compensation resistor RCOMPn is
connected between COMPnb and COMPna on each chan-
nel. An external capacitor from COMPna to SGND together
with RCOMPn will form an R-C filter to serve a type-II
compensation. The RCOMPn can be adjusted using the
MFR_PWM_COMP[4:0] command. The transconductance
of the LTM4700 PWM error amplifier can be adjusted
using the MFR_PWM_COMP[7:5] command. These two
loop compensation parameters can be programmed when
device is in operation. Refer to the Programmable Loop
Compensation subsection in the Applications Information
section for further details.
–
V
(N14), V
OSNS0
age Sense Input. See V
–
I
(P13): Negative Current Sense Amplifier Input. If the
IN
input current sense amplifier is not used, this pin must be
shorted to the I
for detail about the input current sensing.
For more information
www.analog.com
LTM4700
(A6-K6, A7-K7, A8-
IN1
pins and GND pins.
IN
–
(M8): Negative Differential Volt-
OSNS1
+
and V
OSNS0
OSNS1
+
and SV
pins. See Applications section
IN
IN
+
.
Rev. B
17
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